Data Sheet
June 1999
ORCA Series 3C and 3T FPGAs
Programmable Input/Output Cells (continued)
PLC
PIC
ADDRESS
FROM
ROUTING
OUT1
OUT2
DATA
FROM
ROUTING
PIO
LOGIC
PAD
CLK
CLK
OUT1 ADDR1
OUT2 DATA1
ADDR2
ADDR3
ADDR4
ADDR5
DATA5
DATA4
DATA2
DATA3
DATA4
PIC OUTPUT ADDR1
DATA1
ADDR2
DATA2
ADDR3
DATA3
ADDR4
NOTE: PIO LOGIC MODE, OUT1OUT2
5-5799(F)
Figure 25. Output Multiplexing (OUT1OUT2 Mode)
PLC
PIC
ADDRESS
FROM
ROUTING
OUT1
D
Q
CLK
P/O
LOGIC
PAD
DATA
FROM
ROUTING
OUT2
CLK
ADDR ADDR1
ADDR2
ADDR3
ADDR4
DATA3
ADDR3
ADDR5
DATA4
ADDR4
DATA
REG ADDRESS
PAD
DATA1
ADDR1
DATA2
ADDR2
ADDR1 DATA1 ADDR2 DATA2 ADDR3 DATA3 ADDR4
NOTE: PIO LOGIC MODE, OUT1OUT2
5-5797(F)
Figure 26. Output Multiplexing (OUT2OUTREG Mode)
42
Lucent Technologies Inc.
AGERE [ AGERE SYSTEMS ]
