BTF1A16G-TR 参数 Datasheet PDF下载

Data Sheet

March 2001

Dual Differential Transceiver BTF1A

With Idle Bus Indicator

Latch Up

Latch up evaluation has been performed on the data transmission receivers. Latch up testing determines if the

power-supply current exceeds the specified maximum due to the application of a stress to the device under test. A

device is considered susceptible to latch up if the power supply current exceeds the maximum level and remains at

that level after the stress is removed.

Lucent performs latch up testing per an internal test method which is consistent with JEDEC Standard No. 17 (pre-

viously JC-40.2)

CMOS Latch Up Standardized Test Procedure.

Latch up evaluation involves three separate stresses to evaluate latch up susceptibility levels:

1. dc current stressing of input and output pins.

2. Power supply slew rate.

3. Power supply overvoltage.

Table 10. Latch Up Test Criteria and Test Results

dc Current Stress

of I/O Pins

Data Transmission

Receiver ICs

Minimum Criteria

Test Results

≥150

mA

≥250

mA

Power Supply

Slew Rate

≤1

µs

≤100

ns

Power Supply

Overvoltage

≥1.75

x Vmax

≥2.25

x Vmax

Agere Systems Inc.

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