CIRCUIT TECHNOLOGY
C IRC UIT TEC HNO LO G Y
Package Outline Drawings
"FLAT Package"
.990
1.010
Pin #’s & Functions
.890
.910
.008
.012
1
2
+5Vdc A
TX/RX A
3
TX/RX A
ESD Triangle
Identifies Pin 1
4
STROBE A
GROUND A
+5Vdc B
20
11
10
.290
.310
5
6
7
TX/RX B
.400
8
TX/RX B
.050
.075
9
STROBE B
GROUND B
RX DATA OUT B
RX DATA OUT B
TX INHIBIT B
TX DATA IN B
TX DATA IN B
RX DATA OUT A
RX DATA OUT A
TX INHIBIT A
TX DATA IN A
TX DATA IN A
.016
.020
.098
.122
10
11
12
13
14
15
16
17
18
19
20
"DIP Package"
.990
1.010
20
11
.287
.303
.300
10
.008
.012
ESD Triangle
Identifies Pin 1
.025
.045
.150
.MIN
.098
.122
.016
.020
.890
.910
.05
.100
BSC
Notes
1. Dimensions shown are in inches
Specifications subject to change without notice.
Aeroflex Circuit Technology
35 South Service Road
Plainview New York 11803
Telephone: (516) 694-6700
FAX:
(516) 694-6715
Toll Free Inquiries: 1-(800)THE-1553
6
Aeroflex Circuit Technology
SCD4468D REV B 5/25/00 Plainview NY (516) 694-6700
AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
