Timing Diagrams
Read Cycle Timing Diagrams
Write Cycle Timing Diagrams
Write Cycle 1 (WE Controlled, OE = VIL)
Read Cycle 1 (CE = OE = VIL, WE = VIH)
tWC
tRC
A0-16
A0-16
tAA
tAW
tAH
tOH
tCW
DI/O
CE
Previous Data Valid
Data Valid
tAS
tWP
WE
tOW
SEE NOTE
tWHZ
tDH
tDW
SEE NOTE
DI/O
Data Valid
A
Read Cycle 2 (WE = VIH)
tRC
Write Cycle 2 (CE Controlled, OE = VIH )
A0-16
tWC
tAA
A0-16
tAH
tAW
CE
tAS
tACE
tCW
tCHZ
SEE NOTE
CE
tCLZ
SEE NOTE
OE
tWP
tOHZ
tOE
WE
SEE NOTE
tOLZ
SEE NOTE
tDW
tDH
DI/O
Data Valid
High Z
DI/O
Data Valid
Note: Guaranteed by design, but not tested.
DON’T CARE
UNDEFINED
Note: Guaranteed by design, but not tested.
AC Test Circuit
Current Source
IOL
VZ ~ 1.5 V (Bipolar Supply)
To Device Under Test
Parameter
Input Pulse Level
Typical
Units
V
CL =
0 – 3.0
5
50 pF
Input Rise and Fall
ns
V
IOH
Current Source
Input and Output Timing Reference Level
Output Lead Capacitance
1.5
50
pF
Notes:
1) VZ is programmable from -2V to +7V. 2) IOL and IOH programmable from 0 to 16 mA. 3) Tester Impedance
ZO = 75Ω. 4) VZ is typically the midpoint of VOH and VOL. 5) IOL and IOH are adjusted to simulate a typical resistance
load circuit. 6) ATE Tester includes jig capacitance.
Aeroflex Circuit Technology ACT-S128K32
SCD1659 REV E 5/21/01 Plainview NY (516) 694-6700
4
AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
