Table 9: External I/O Reset State
I/O State During
Reset
External I/O
Port 2 (P2.5)
I/O Function After Reset
I/O State After Reset
PWM0
Pulled Down
Driven Low Output
PWM0
Port 2 (P2.6)
T2UP-DN
P2.6
Pulled Up
Pulled Up
Pulled Up
Pulled Up
Port 2 (P2.7)
T2CAPTURE
P2.7 and T2CAPTURE
Undefined Input1
Undefined I/O1
Undefined Input1
Undefined Input1
Undefined I/O1,2
Undefined Input1
EDACEN
ECB5
EDACEN
ECB5
READY
BUSWIDTH
READY
BUSWIDTH
BHE
Undefined Input1
Pulled Up
Undefined Input1
Driven Output
BHE
WRH
CLKOUT
INST
CLKOUT
INST
Driven Output
Pulled Down
Driven Output
Driven Output
Pulled Up
RESET
RESET
Pulled Low by
System
Notes:
1. These pins must not be left floating. Input voltages must not exceed V
during power-up.
DD
2. Do not directly tie these pins to V
or GND; if EDACEN goes low, they may be driven by the UT80CRH196KD and bus contention may occur.
DD
10
AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
