READ CYCLE
The chip enable-controlled access is initiated byCE going active
while OE remains asserted, PE remains deasserted, and the
addresses remain stable for the entire cycle. After the specified
tELQV is satisfied, the eight-bit word addressed by A(14:0)
A combination of PE greater than VIH(min), and CE less than
VIL(max) defines a read cycle. Read access time is measured
from the latter of device enable, output enable, or valid address
to valid data output.
appears at the data outputs DQ(7:0).
Output enable-controlled access is initiated by OE going active
while CE is asserted, PE is deasserted, and the addresses are
stable. Read access time is tGLQV unless tAVQV or tELQV have
An address access read is initiated by a change in address inputs
while the chip is enabled withOE asserted and PE deasserted.
Valid data appears on data output, DQ(7:0), after the specified
tAVQV is satisfied. Outputs remain active throughout the entire
not been satisfied.
cycle. As long as device enable and output enable are active, the
address inputs may change at a rate equal to the minimum read
cycle time.
AC CHARACTERISTICS READ CYCLE (Post-Radiation)*
(VDD = 5.0V ±10%; -55°C < TC < +125°C)
SYMBOL
PARAMETER
28F256-45
28F256-40
UNIT
MIN
MAX
MIN
MAX
1
Read cycle time
45
40
ns
tAVAV
tAVQV
Read access time
Output hold time
45
40
ns
ns
2
0
0
0
0
tAXQX
2
OE-controlled output enable time
ns
tGLQX
tGLQV
tGHQZ
OE-controlled access time
OE-controlled output three-state time
CE -controlled output enable time
15
15
15
15
ns
ns
ns
2
0
0
tELQX
tELQV
tEHQZ
CE -controlled access time
45
15
40
15
ns
ns
CE-controlled output three-state time
Notes:
Post-radiation performance guaranteed at 25°C per MIL-STD-883 Method 1019 at 1E6 rads(Si).
*
1. Functional test.
2. Three-state is defined as a 400mV change from steady-state output voltage.
4
AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
