3.0 RADIATION HARDNESS
The UT69RH051 incorporates special design and layout features
which allow operation in high-level radiation environments.
UTMC has developed special low-temperature processing
techniques designed to enhance the total-dose radiation hardness
of both the gate oxide and the field oxide while maintaining the
RADIATION HARDNESS DESIGN SPECIFICATIONS
1
Total Dose
LET Threshold
Neutron Fluence
Saturated Cross-Section (1Kx8)
Single Event Upset
Single Event Latchup
1
Note:
1. Worst case temperature T
A
= +125
°
C.
2. Adams 90% worst case environment (geosynchronous).
circuit density and reliability. For transient radiation hardness
and latchup immunity, UTMC builds all radiation-hardened
products on epitaxial wafers using an advanced twin-tub CMOS
process. In addition, UTMC pays special attention to power and
ground distribution during the design phase, minimizing dose-
rate upset caused by rail collapse.
1.0E6
20
1.0E14
1E-4
1.3E-7
LET>126
rad(Si)
MeV-cm
2
/mg
n/cm
2
cm
2
/device
errors/device-day
2
MeV-cm
2
/mg
4.0 ABSOLUTE MAXIMUM RATINGS
1
(Referenced to V
SS
)
SYMBOL
V
DD
V
I/O
T
STG
P
D
T
J
Θ
JC
I
I
PARAMETER
DC Supply Voltage
Voltage on Any Pin
Storage Temperature
Maximum Power Dissipation
Maximum Junction Temperature
Thermal Resistance, Junction-to-Case
2
DC Input Current
LIMITS
-0.5 to 7.0
-0.5 to V
DD
+0.3V
-65 to +150
750
175
10
UNITS
V
V
°C
mW
°C
°C/W
mA
±
10
Notes:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device
at these or any other conditions beyond limits indicated in the operational sections of this specification is not recommended. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2. Test per MIL-STD-883, Method 1012.
7
AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
