Data Sheet
ADXL36±
ACTIVITY/INACTIVITY CONTROL REGISTER
Address: 0x27, Reset: 0x00, Name: ACT_INACT_CTL
Table 13. Bit Descriptions for ACT_INACT_CTL
Bits
[7:6]
[5:4]
Bit Name
Settings Description
Reset
Access
RW
UNUSED
Unused Bits.
0x0
0x0
LINK/LOOP
X0 Default Mode.
RW
Activity and inactivity detection are both enabled, and their interrupts (if
mapped) must be acknowledged by the host processor by reading the
STATUS register. Autosleep is disabled in this mode. Use this mode for free
fall detection applications.
01 Linked Mode.
Activity and inactivity detection are linked sequentially such that only one
is enabled at a time. Their interrupts (if mapped) must be acknowledged
by the host processor by reading the STATUS register.
11 Loop Mode.
Activity and inactivity detection are linked sequentially such that only one
is enabled at a time, and their interrupts are internally acknowledged (do
not need to be serviced by the host processor).
To use either linked or looped mode, both ACT_EN (Bit 0) and INACT_EN
(Bit 2) must be set to 1; otherwise, the default mode is used. For additional
information, refer to the Linking Activity and Inactivity Detection section.
3
INACT_REF
Referenced/Absolute Inactivity Select.
0x0
RW
1 = inactivity detection function operates in referenced mode.
0= inactivity detection function operates in absolute mode.
Inactivity Enable.
1 = enables the inactivity (underthreshold) functionality.
Referenced/Absolute Activity Select.
2
1
INACT_EN
ACT_REF
0x0
0x0
RW
RW
1 = activity detection function operates in referenced mode.
0 = activity detection function operates in absolute mode.
Activity Enable.
0
ACT_EN
0x0
RW
1 = enables the activity (overthreshold) functionality.
Rev. B | Page 29 of 44
ADI [ ADI ]
