ADV7390/ADV7391/ADV7392/ADV7393
FUNCTIONAL BLOCK DIAGRAMS
DGND (2)
V
DD
(2)
SCL
SDA
ALSB
SFL
AGND
V
AA
GND_IO
V
DD_IO
ADD
SYNC
VBI DATA SERVICE
INSERTION
Data Sheet
MPU PORT
ADV7390/ADV7391
SUBCARRIER FREQUENCY
LOCK (SFL)
YCrCb
TO
RGB
16×
FILTER
11-BIT
DAC 1
11-BIT
DAC 2
DAC 1
MULTIPLEXER
8-BIT SD
OR
8-BIT ED/HD
SDR/DDR
SD/ED/HD INPUT
4:2:2 TO 4:4:4
DEINTERLEAVE
PROGRAMMABLE
LUMINANCE
FILTER
DAC 2
ADD
BURST
ASYNC
BYPASS
YCrCb
HDTV
TEST
PATTERN
GENERATOR
PROGRAMMABLE
CHROMINANCE
FILTER
SIN/COS DDS
BLOCK
16×
FILTER
11-BIT
DAC 3
DAC 3
PROGRAMMABLE
ED/HD FILTERS
SHARPNESS AND
ADAPTIVE FILTER
CONTROL
YCbCr
TO
RGB MATRIX
4×
FILTER
POWER
MANAGEMENT
CONTROL
VIDEO TIMING GENERATOR
16×/4× OVERSAMPLING PLL
REFERENCE
AND CABLE
DETECT
R
SET
06234-001
RESET
HSYNC
VSYNC
CLKIN
PV
DD
PGND EXT_LF
COMP
Figure 1.
(32-Lead LFCSP)
DGND (2)
V
DD
(2)
SCL
SDA
ALSB
SFL
AGND
V
AA
GND_IO
V
DD_IO
VBI DATA SERVICE
INSERTION
MPU PORT
ADV7390BCBZ
SUBCARRIER FREQUENCY
LOCK (SFL)
MULTIPLEXER
8-BIT SD
SDR/DDR
SD INPUT
4:2:2 TO 4:4:4
DEINTERLEAVE
ADD
SYNC
PROGRAMMABLE
LUMINANCE
FILTER
16×
FILTER
11-BIT
DAC 1
DAC 1
ADD
BURST
PROGRAMMABLE
CHROMINANCE
FILTER
SIN/COS DDS
BLOCK
16×
FILTER
POWER
MANAGEMENT
CONTROL
VIDEO TIMING GENERATOR
16× OVERSAMPLING PLL
REFERENCE
AND CABLE
DETECT
R
SET
06234-146
RESET
HSYNC
VSYNC
CLKIN
PV
DD
PGND EXT_LF
COMP
Figure 2.
(30-Ball WLCSP)
DGND (2)
V
DD
(2)
SCL
SDA
ALSB
SFL
AGND
V
AA
GND_IO
V
DD_IO
VBI DATA SERVICE
INSERTION
MPU PORT
ADV7392/ADV7393
SUBCARRIER FREQUENCY
LOCK (SFL)
YCrCb
TO
RGB
16×
FILTER
12-BIT
DAC 1
12-BIT
DAC 2
MULTIPLEXER
DAC 1
8-/10-/16-BIT SD
OR
8-/10-/16-BIT ED/HD
SDR/DDR
SD/ED/HD INPUT
4:2:2 TO 4:4:4
DEINTERLEAVE
RGB
TO
YCrCb
MATRIX
ADD
SYNC
PROGRAMMABLE
LUMINANCE
FILTER
DAC 2
ADD
BURST
ASYNC
BYPASS
YCrCb
HDTV
TEST
PATTERN
GENERATOR
PROGRAMMABLE
CHROMINANCE
FILTER
SIN/COS DDS
BLOCK
16×
FILTER
12-BIT
DAC 3
DAC 3
PROGRAMMABLE
ED/HD FILTERS
SHARPNESS AND
ADAPTIVE FILTER
CONTROL
YCbCr
TO
RGB MATRIX
4×
FILTER
POWER
MANAGEMENT
CONTROL
VIDEO TIMING GENERATOR
16x/4x OVERSAMPLING PLL
REFERENCE
AND CABLE
DETECT
R
SET
06234-145
RESET
HSYNC
VSYNC
CLKIN
PV
DD
PGND EXT_LF
COMP
Figure 3.
(40-Lead LFCSP)
Rev. I | Page 6 of 107
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