ADV7190/ADV7191
DETAILED DESCRIPTION OF FEATURES
Clocking:
Single 27 MHz Clock Required to Run the Device
4 Oversampling with Internal 54 MHz PLL
Square Pixel Operation
Advanced Power Management
Programmable Video Control Features:
Digital Noise Reduction
Pedestal level
Hue, Brightness, Contrast and Saturation
Clamping Output Signal
VBI (Vertical Blanking Interval)
Subcarrier Frequency and Phase
LUMA Delay
CHROMA Delay
Gamma Correction
Luma and Chroma Filters
Luma SSAF (Super Subalias Filter)
Average Brightness Detection
Field Counter
Interlaced/Noninterlaced Operation
Complete On-Chip Video Timing Generator
Programmable Multimode Master/Slave Operation
CGMS (Copy Generation Management System)
WSS (Wide Screen Signaling)
Macrovision 7.1 Rev
Closed Captioning Support
Teletext Insertion Port (PAL-WST)
2-Wire Serial MPU Interface
I
2
C Registers Synchronized to VSYNC
Six DACs are available on the ADV7190/ADV7191, each of which
is capable of providing 4.33 mA of current. In addition to the
composite output signal there is the facility to output S-Video
(Y/C Video), RGB Video and YUV Video. All YUV formats
(Betacam, MII and (SMPTE/EBU N10) are supported.
Digital Noise Reduction allows improved picture quality in remov-
ing low amplitude, high frequency noise. The block diagram below
shows the DNR functionality in the two modes available.
DNR MODE
DNR CONTROL
GAIN
BLOCK SIZE CONTROL CORING GAIN DATA
BORDER AREA
CORING GAIN BORDER
BLOCK OFFSET
NOISE SIGNAL PATH
INPUT FILTER
BLOCK
Y DATA
INPUT
FILTER OUTPUT
<THRESHOLD?
FILTER OUTPUT>
THRESHOLD
MAIN SIGNAL PATH
SUBTRACT SIGNAL IN THRESHOLD
RANGE FROM ORIGINAL SIGNAL
DNR OUT
DNR SHARPNESS MODE
DNR CONTROL
GAIN
BLOCK SIZE CONTROL CORING GAIN DATA
BORDER AREA
CORING GAIN BORDER
BLOCK OFFSET
NOISE SIGNAL PATH
INPUT FILTER
BLOCK
Y DATA
INPUT
FILTER OUTPUT
>THRESHOLD?
FILTER OUTPUT<
THRESHOLD
MAIN SIGNAL PATH
ADD SIGNAL ABOVE THRESHOLD
RANGE TO ORIGINAL SIGNAL
GENERAL DESCRIPTION
DNR OUT
The ADV7190/ADV7191 is an integrated Digital Video Encoder
that converts digital CCIR-601/656 4:2:2 8-bit or 16-bit com-
ponent video data into a standard analog baseband television
signal compatible with worldwide standards.
Figure 5. Block Diagram for DNR Mode and DNR Sharpness
Mode
PAL_NTSC
HSYNC
VSYNC
BLANK
RESET
TTX
TTXRQ
VSO/CLAMP
CSO_HSO
CGMS/WSS
AND
CLOSED CAPTIONING
CONTROL
SCL
SDA ALSB
VIDEO TIMING
GENERATOR
I
2
C MPU PORT
YUV-TO-RGB
MATRIX
AND
YUV LEVEL
CONTROL
BLOCK
TELETEXT
INSERTION
BLOCK
10
10
YCrCb
Y
TO
10
YUV
U
MATRIX
10
V
10 10 10
DNR
Y
AND
10
GAMMA
U
10
CORRECTION
V
BRIGHTNESS
CONTROL
AND
ADD SYNC
AND
INTERPOLATOR
SATURATION
CONTROL
AND
ADD BURST
AND
INTERPOLATOR
PROGRAMMABLE
LUMA FILTER
AND
SHARPNESS
FILTER
M
U
L
T
I
P
L
E
X
E
R
PROGRAMMABLE
CHROMA
FILTER
MODULATOR
AND
HUE CONTROL
P0
DEMUX
P15
I
N
T
E
R
P
O
L
A
T
O
R
I
N
T
E
R
P
O
L
A
T
O
R
10-BIT
DAC
10-BIT
DAC
10-BIT
DAC
DAC
CONTROL
BLOCK
10-BIT
DAC
10-BIT
DAC
10-BIT
DAC
DAC
CONTROL
BLOCK
DAC A
DAC B
DAC C
V
REF
R
SET2
COMP2
DAC D
DAC F
DAC E
CLKIN
CLKOUT
PLL
ADV7190/ADV7191
REAL-TIME
CONTROL
CIRCUIT
SIN/COS
DDS
BLOCK
R
SET1
COMP1
SCRESET/RTC/TR
Figure 4. Detailed Functional Block Diagram
REV. 0
–11–
AD [ ANALOG DEVICES ]
