ADV7172/ADV7173
FUNCTIONAL BLOCK DIAGRAM
CLOCK PAL NTSC
CSO_HSO VSO
CLAMP
HSYNC
FIELD/
VSYNC
BLANK
RESET
TTX
TTXREQ
V
AA
8
SCLOCK SDATA
ALSB
VIDEO TIMING
GENERATOR
I
2
C MPU PORT
TELETEXT
INSERTION BLOCK
BRIGHTNESS AND
CONTRAST CONTROL
+
ADD SYNC
+
INTERPOLATOR
10
YUV TO
RBG
MATRIX
+
YUV
LEVEL
CONTROL
BLOCK
10
10
10
Y
YCrCb
U
TO
YUV
MATRIX
V
8
P0
COLOR
DATA
P7
LUMA
PROGRAMMABLE
FILTER
+
SHARPNESS
FILTER
10
M
U
L
T
I
P
L
E
X
E
R
M
U
L
T
I
P
L
E
X
E
R
10
10-BIT
DAC
10-BIT
DAC
10-BIT
DAC
DAC A
DAC B
DAC C
V
REF
R
SET2
COMP2
DAC E
DAC F
DAC D
10
10
DAC
CONTROL
BLOCK
10
4:2:2 TO
4:4:4
INTER-
POLATOR
8
10-BIT
DAC
10-BIT
DAC
10-BIT
DAC
8
8
8
SATURATION CONTROL
10
+
ADD BURST
10
+
INTERPOLATOR
PROGRAMMABLE
CHROMA
FILTER
MODULATOR
+
HUE
CONTROL
10
10
10
10
10
10
ADV7172/ADV7173
REAL-TIME
CONTROL CIRCUIT
SIN/COS
DDS BLOCK
DAC
CONTROL
BLOCK
R
SET1
COMP1
SCRESET/RTC
GND
The ADV7172/ADV7173 also supports both PAL and NTSC
square pixel operation. The parts also incorporate WSS and
CGMS-A data control generation.
The ADV7172/ADV7173 is designed with four color controls
(hue, contrast, brightness and saturation). All YUV formats
(SMPTE, MII and Betacam) are supported in both PAL and
NTSC.
The output video frames are synchronized with the incoming
data Timing Reference Codes. Optionally the encoder accepts
(and can generate)
HSYNC
,
VSYNC
and FIELD timing
signals. These timing signals can be adjusted to change pulse-
width and position while the part is in the master mode. The
Encoder requires a single two times pixel rate (27 MHz) clock
for standard operation. Alternatively the Encoder requires a
24.54 MHz clock for NTSC or 29.5 MHz clock for PAL square
pixel mode operation. All internal timing is generated on-chip.
HSO/CSO and VSO TTL outputs, synchronous to the analog
output video, are also available. A programmable CLAMP
output signal is also available to enable clamping in either the
front or back porch of the video signal.
A separate teletext port enables the user to directly input tele-
text data during the vertical blanking interval.
The ADV7172/ADV7173 modes are set up over a two wire
serial bidirectional port (I
2
C-Compatible) with two slave ad-
dresses. Functionally the ADV7173 and ADV7172 are the same
with the exception that the ADV7172 can output the Macrovi-
sion anticopy algorithm.
The ADV7172/ADV7173 is packaged in a 48-lead LQFP pack-
age (1.4 mm thickness).
DATA PATH DESCRIPTION
Cb typically have a range of 128
±
112; however, it is possible
to input data from 1 to 254 on both Y, Cb and Cr. The ADV7172/
ADV7173 supports PAL (B, D, G, H, I, N, M) and NTSC
(with and without pedestal) standards. The Y data is then ma-
nipulated by being scaled for contrast control and a setup level
is added for brightness control. The Cr, Cb data is also scaled
and saturation control is added. The appropriate Sync, Blank
and Burst levels are then added to the YCrCb data. Macrovi-
sion AntiTaping (ADV7172 only), Closed-Captioning and
Teletext levels are also added to Y, and the resultant data is
interpolated to a rate of 27 MHz. The interpolated data is fil-
tered and scaled by three digital FIR Filters.
The U and V Signals are modulated by the appropriate sub-
carrier sine/cosine phases and a phase offset may be added onto
the color subcarrier during active video to allow hue adjustment.
The resulting U and V signals are then added together to make
up the chrominance signal. The luma (Y) signal can be delayed
1–3 luma cycles (each cycle is 74 ns) with respect to the chroma
signal. The luma and chroma signals are then added together to
make up the composite video signal. All edges are slew rate
limited.
The YCrCb data is also used to generate RGB data with appro-
priate Sync and Blank levels. The YUV levels are also scaled to
output the suitable SMPTE or Betacam levels.
There are six DACs on the ADV7172/ADV7173. Three of these
DACs are capable of providing 34.66 mA of current. The other
three DACs provide 8.66 mA each.
The six l0-bit DACs can be used to output:
1. Composite Video + RGB Video + LUMA + CHROMA.
2. Composite Video + YUV Video + LUMA + CHROMA.
Alternatively, each DAC can be individually powered off if not
required. A complete description of DAC output configurations
is given in Appendix 8.
Video output levels are illustrated in Appendix 6.
(continued
on page
11)
For PAL B, D, G, H, I, M, N and NTSC M, N modes, YCrCb
4:2:2 Data is input via the CCIR-656-Compatible Pixel Port at
a 27 MHz Data Rate. The Pixel Data is demultiplexed to form
three data paths. Y typically has a range of 16 to 235, Cr and
–2–
REV. A
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