ADV7170/ADV7171
CLOCK
SCRESET/RTC
COMPOSITE VIDEO
(FOR EXAMPLE,
VCR OR CABLE)
VIDEO
DECODER
(FOR EXAMPLE,
ADV7185)
GREEN/LUMA/Y
RED/CHROMA/V
P7–P0
BLUE/COMPOSITE/U
COMPOSITE
HSYNC
FIELD/VSYNC
ADV7170/ADV7171
SEQUENCE
RESERVED
2
BIT
H/LTRANSITION
COUNT START
RESET
5 BITS
4 BITS
RESERVED
3
BIT
RESERVED
LOW
14 BITS
RESERVED
128
1
F
PLL INCREMENT
SC
0
0
13
21
RTC
TIME SLOT: 01
67 68
14
19
NOT USED IN
ADV7170/ADV7171
VALID
INVALID
8/LLC
SAMPLE SAMPLE
NOTES:
1
2
3
F
F
PLL INCREMENT IS 22 BITS LONG, VALUE LOADED INTO ADV7170/ADV7171 FSC DDS REGISTER IS
PLL INCREMENTS BITS 21:0 PLUS BITS 0:9 OF SUBCARRIER FREQUENCY REGISTERS. ALL ZEROS SHOULD
SC
SC
BE WRITTEN TO THE SUBCARRIER FREQUENCY REGISTERS OF THE ADV7170/ADV7171.
SEQUENCE BIT
PAL: 0 = LINE NORMAL, 1 = LINE INVERTED
NTSC: 0 = NO CHANGE
RESET BIT
RESET ADV7170/ADV7171 DDS
Figure 19. RTC Timing and Connections
Vertical Blanking Data Insertion
Mode 0 (CCIR-656): Slave Option
(Timing Register 0 TR0 = X X X X X 0 0 0)
It is possible to allow encoding of incoming YCbCr data on
those lines of VBI that do not bear line sync or pre-/post-
equalization pulses (see Figure 21 to Figure 32). This mode of
operation is called “partial blanking” and is selected by setting
MR32 to 1. It allows the insertion of any VBI data (opened VBI)
into the encoded output waveform. This data is present in the
digitized incoming YcbCr data stream (for example, WSS data,
CGMS, VPS, and so on). Alternatively, the entire VBI may be
blanked (no VBI data inserted) on these lines by setting MR32
to 0.
The ADV7170/ADV7171 are controlled by the SAV (start active
video) and EAV (end active video) time codes in the pixel data.
All timing information is transmitted using a 4-byte synchroni-
zation pattern. A synchronization pattern is sent immediately
before and after each line during active picture and retrace.
HSYNC
VSYNC
Mode 0 is shown in Figure 20. The
, FIELD/
,
BLANK
and
(if not used) pins should be tied high during this
mode.
ANALOG
VIDEO
EAV CODE
SAV CODE
C
b
C
r
C
b
8
0
0
0
F
F
F A A
F B B
A
B
8
0
0
0
C
r
F
F
0
0
0
0
X
Y
1
0
8
0
1
0
8
0
1
0
1
0
F
F
0
0
X
Y
C
b
C
r
Y
Y
Y
Y
Y
Y
INPUT PIXELS
ANCILLARY DATA
(HANC)
4 CLOCK
4 CLOCK
4 CLOCK
4 CLOCK
1440 CLOCK
1440 CLOCK
268 CLOCK
NTSC/PAL M SYSTEM
(525 LINES/60Hz)
280 CLOCK
PAL SYSTEM
(625 LINES/50Hz)
START OF ACTIVE
VIDEO LINE
END OF ACTIVE
VIDEO LINE
Figure 20. Timing Mode 0 (Slave Mode)
Rev. C | Page 19 of 64
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