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ADV7127KRUZ140 参数 Datasheet PDF下载

ADV7127KRUZ140图片预览
型号: ADV7127KRUZ140
PDF下载: 下载PDF文件 查看货源
内容描述: [CMOS, 240 MHz, 10-Bit, High Speed Video DAC]
分类和应用: PC光电二极管转换器
文件页数/大小: 19 页 / 421 K
品牌: AD [ ANALOG DEVICES ]
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Data Sheet
5 V TIMING SPECIFICATIONS
ADV7127
V
AA
= 5 V ± 5%,
1
V
REF
= 1.235 V, R
SET
= 560 Ω, C
L
= 10 pF. All specifications T
MIN
to T
MAX
,
2
unless otherwise noted. T
J MAX
= 110°C.
Table 3.
Parameter
3
ANALOG OUTPUTS
Delay
Rise/Fall Time
4
Transition Time
5
Skew
6
CLOCK CONTROL
7
Symbol
t
6
t
7
t
8
t
9
f
CLK
0.5
0.5
0.5
1.5
2.5
1.875
2.85
8.0
1.875
2.85
8.0
1.0
1.1
Min
Typ
5.5
1.0
15
1
Max
Unit
ns
ns
ns
ns
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
Clock cycles
ns
ns
f
MAX
= 240 MHz
f
MAX
= 140 MHz
f
MAX
= 50 MHz
f
MAX
= 240 MHz
f
MAX
= 140 MHz
f
MAX
= 50 MHz
Not shown in Figure 2
Not shown in Figure 2
Not shown in Figure 2
Test Conditions/Comments
2
50
140
240
Not shown in Figure 2
50 MHz grade
140 MHz grade
240 MHz grade
Data and Control
Setup
Hold
Clock Pulse Width
High
t
1
t
2
t
4
Low
t
5
1.25
Pipeline Delay
6
Up Time
PSAVE
6
PDOWN
1
2
t
PD
t
10
t
11
1.0
2
320
1.0
10
Maximum and minimum specifications are guaranteed over this range in Table 3.
Temperature range: T
MIN
to T
MAX
: −40°C to +85°C at 50 MHz and 140 MHz, and 0°C to 70°C at 240 MHz.
3
Timing specifications are measured with input levels of 3.0 V (V
IH
) and 0 V (V
IL
) for both 5 V and 3.3 V supplies.
4
Rise time was measured from the 10% to 90% point of zero to full-scale transition, and fall time from the 90% to 10% point of a full-scale transition.
5
Measured from 50% point of full-scale transition to 2% of final value.
6
Guaranteed by characterization.
7
f
CLK
maximum specification production tested at 125 MHz and 5 V. Limits specified in Table 3 are guaranteed by characterization.
Rev. A | Page 5 of 18