ADV7125
CIRCUIT DESCRIPTION AND OPERATION
The ADV7125 contains three 8-bit DACs, with three input
channels, each containing an 8-bit register. Also integrated on
board the part is a reference amplifier. CRT control functions
BLANK
and
SYNC
are integrated on board the ADV7125.
Digital Inputs
Twenty-four bits of pixel data (color information) R0–R7, G0–G7,
and B0–B7 are latched into the device on the rising edge of
each clock cycle. This data is presented to the three 8-bit DACs
and then converted to three analog (RGB) output waveforms
(See Figure 2).
CLOCK
DIGITAL INPUTS
(R7–R0, G7–G0, B7–B0,
SYNC, BLANK)
ANALOG OUTPUTS
(IOR, IOR, IOB
IOR, IOG, IOB)
The
BLANK
and
SYNC
functions allow for the encoding of
these video synchronization signals onto the RGB video output.
This is done by adding appropriately weighted current sources
to the analog outputs, as determined by the logic levels on the
BLANK
and
SYNC
digital inputs. Figure 3 shows the analog
output, RGB video waveform of the ADV7125. The influence of
SYNC
and
BLANK
on the analog video waveform is illustrated.
Table I details the resultant effect on the analog outputs of
BLANK
and
SYNC.
All these digital inputs are specified to accept TTL logic levels.
Clock Input
DATA
The CLOCK input of the ADV7125 is typically the pixel clock
rate of the system. It is also known as the dot rate. The dot rate,
and thus the required CLOCK frequency, will be determined by
the on-screen resolution, according to the following equation:
Dot Rate
= (Horiz
Res)
×
(Vert
Res)
×
(Refresh
Rate)/(Retrace Factor)
Horiz Res
= Number of Pixels/Line
Vert Res
= Number of Lines/Frame
Refresh Rate
= Horizontal Scan Rate. This is the rate at which
the screen must be refreshed, typically 60 Hz for a noninterlaced
system or 30 Hz for an interlaced system.
Retrace Factor
= Total Blank Time Factor. This takes into account
that the display is blanked for a certain fraction of the total
duration of each frame (e.g., 0.8).
Figure 2. Video Data Input/Output
The ADV7125 has two additional control signals that are latched
to the analog video outputs in a similar fashion.
BLANK
and
SYNC
are each latched on the rising edge of CLOCK to maintain
synchronization with the pixel data stream.
RED, BLUE
mA
18.62
V
0.7
GREEN
mA
26.67
V
1.000
WHITE LEVEL
100 IRE
0
0
8.62
0.3
BLANK
LEVEL
43 IRE
0
0
SYNC
LEVEL
NOTES
1. OUTPUTS CONNECTED TO A DOUBLY TERMINATED 75 LOAD.
2. V
REF
= 1.235V, R
SET
= 530 .
3. RS-343A LEVELS AND TOLERANCES ASSUMED ON ALL LEVELS.
Figure 3. RGB Video Output Waveform
Table I. Video Output Truth Table (R
SET
= 530
Ω,
R
LOAD
= 37.5
Ω)
Description
WHITE LEVEL
VIDEO
VIDEO to
BLANK
BLACK LEVEL
BLACK to
BLANK
BLANK
LEVEL
SYNC
LEVEL
IOG (mA)
26.67
Video + 8.05
Video
8.05
0
8.05
0
IOG
(mA)
0
18.62 – Video
18.62 – Video
18.62
18.62
18.62
18.62
IOR/IOB
18.62
Video
Video
0
0
0
0
IOR/IOB
0
18.62 – Video
18.62 – Video
18.62
18.62
18.62
18.62
SYNC
1
1
0
1
0
1
0
BLANK
1
1
1
1
1
0
0
DAC Input Data
FFH
Data
Data
00H
00H
xxH
xxH
REV. 0
–9–
AD [ ANALOG DEVICES ]
