ADV7125
5 V TIMING SPECIFICATIONS
Parameter
ANALOG OUTPUTS
Analog Output Delay, t
6
Analog Output Rise/Fall Time, t
74
Analog Output Transition Time, t
85
Analog Output Skew, t
96
CLOCK CONTROL
f
CLK7
f
CLK7
f
CLK7
Data and Control Setup, t
16
Data and Control Hold, t
26
Clock Period, t
3
Clock Pulsewidth High, t
46
Clock Pulsewidth Low, t
56
Clock Pulsewidth High, t
46
Clock Pulsewidth Low, t
56
Clock Pulsewidth High, t
4
Clock Pulsewidth Low, t
5
Pipeline Delay, t
PD6
PSAVE Up Time, t
106
0.5
0.5
0.5
0.5
1.5
4.17
1.875
1.875
2.85
2.85
8.0
8.0
1.0
3
2
1
(V
AA
= 5 V
±
5% , V
REF
= 1.235 V, R
SET
= 560 , C
L
= 10 pF. All specifications T
MIN
to T
MAX
,
unless otherwise noted, T
J MAX
= 110 C.)
Typ
5.5
1.0
15
1
Max
Min
Unit
ns
ns
ns
ns
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
Clock Cycles
ns
Condition
2
50
140
240
50 MHz Grade
140 MHz Grade
240 MHz Grade
f
CLK_MAX
= 240 MHz
f
CLK_MAX
= 240 MHz
f
CLK_MAX
= 140 MHz
f
CLK_MAX
= 140 MHz
f
CLK_MAX
= 50 MHz
f
CLK_MAX
= 50 MHz
1.0
2
1.0
10
NOTES
1
Timing specifications are measured with input levels of 3.0 V (V
IH
) and 0 V (V
IL
) for both 5 V and 3.3 V supplies.
2
These maximum and minimum specifications are guaranteed over this range.
3
Temperature range T
MIN
to T
MAX
: –40°C to +85°C at 50 MHz and 140 MHz, 0°C to +70°C at 240 MHz.
4
Rise time was measured from the 10% to 90% point of zero to full-scale transition, fall time from the 90% to 10% point of a full-scale transition.
5
Measured from 50% point of full-scale transition to 2% of final value.
6
Guaranteed by characterization.
7
f
CLK
max specification production tested at 125 MHz and 5 V. Limits specified here are guaranteed by characterization.
Specifications subject to change without notice.
–4–
REV. 0
AD [ ANALOG DEVICES ]
