ADV7123
ANALOG SIGNAL INTERCONNECT
Place the ADV7123 as close as possible to the output connec-
tors, thus minimizing noise pickup and reflections due to
impedance mismatch.
The video output signals should overlay the ground plane and
not the analog power plane, thereby maximizing the high
frequency power supply rejection.
For optimum performance, the analog outputs should each
have a source termination resistance to ground of 75 Ω (doubly
terminated 75 Ω configuration). This termination resistance
should be as close as possible to the ADV7123 to minimize
reflections.
Additional information on PCB design is available in the
AN-333 Application Note,
Design and Layout of a Video
Graphics System for Reduced EMI,
which is available from
Analog Devices at
POWER SUPPLY DECOUPLING
(0.1µF AND 0.01µF CAPACITOR
FOR EACH V
AA
GROUP)
0.1µF
0.1µF
V
AA
39 TO 48
R9 TO R0
1 TO 10
VIDEO
DATA
INPUTS
14 TO 23
B9 TO B0
G9 TO G0
IOR
34
75Ω
IOG
32
75Ω
V
REF 36
1
35
COMP
0.01µF
V
AA
13, 29,
30
V
AA
V
AA
1kΩ
AD1580
R
SET 37
R
SET
530Ω
1µF
2
COAXIAL CABLE
75Ω
MONITOR (CRT)
ADV7123
IOB
28
75Ω
12
SYNC
11
BLANK
75Ω
75Ω
BNC
CONNECTORS
75Ω
IOR
33
IOG
31
COMPLEMENTARY
OUTPUTS
24
CLOCK
38
PSAVE
IOB
27
GND
25, 26
00215-028
Figure 28. Typical Connection Diagram
Rev. D | Page 20 of 24
AD [ ANALOG DEVICES ]
