ADV7123
For optimum performance, the analog outputs should each
have a source termination resistance to ground of 75 ꢁ (doubly
terminated 75 ꢁ configuration). This termination resistance
should be as close as possible to the ADV7123 to minimize
reflections.
ANALOG SIGNAL INTERCONNECT
Place the ADV7123 as close as possible to the output connec-
tors, thus minimizing noise pickup and reflections due to
impedance mismatch.
The video output signals should overlay the ground plane and
not the analog power plane, thereby maximizing the high
frequency power supply rejection.
Additional information on PCB design is available in the
AN-333 Application Note, Design and Layout of a Video
Graphics System for Reduced EMI, which is available from
Analog Devices at www.analog.com.
POWER SUPPLY DECOUPLING
(0.1µF AND 0.01µF CAPACITOR
FOR EACH V GROUP)
AA
0.1µF
0.01µF
13, 29,
30
0.1µF
COMP
V
AA
35
V
V
AA
AA
V
AA
39 TO 48
1 TO 10
1kΩ
1µF
36
37
V
REF
R9 TO R0
1
AD1580
2
R
SET
R
VIDEO
DATA
INPUTS
SET
530Ω
MONITOR (CRT)
COAXIAL CABLE
G9 TO G0
75Ω
34
32
28
IOR
IOG
14 TO 23
75Ω
75Ω
75Ω
B9 TO B0
ADV7123
IOB
75Ω
75Ω
75Ω
BNC
CONNECTORS
SYNC
12
11
24
38
33
31
IOR
IOG
BLANK
CLOCK
PSAVE
COMPLEMENTARY
OUTPUTS
IOB 27
GND
25, 26
Figure 28. Typical Connection Diagram
Rev. D | Page 20 of 24
ADI [ ADI ]
