ADuM1400/ADuM1401/ADuM1402
Parameter
90 Mbps (CRW Grade Only)
Symbol
Min
Typ
Max Unit
Test Conditions
VDD1 Supply Current
5 V/3 V Operation
IDD1 (90)
57
30
82
52
mA
mA
45 MHz logic signal freq.
45 MHz logic signal freq.
3 V/5 V Operation
VDD2 Supply Current
5 V/3 V Operation
IDD2 (90)
18
31
27
43
mA
mA
45 MHz logic signal freq.
45 MHz logic signal freq.
3 V/5 V Operation
ADuM1402 Total Supply Current, Four Channels2
DC to 2 Mbps
VDD1 Supply Current
5 V/3 V Operation
IDD1 (Q)
1.5
0.9
2.1
1.5
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
3 V/5 V Operation
VDD2 Supply Current
5 V/3 V Operation
IDD2 (Q)
0.9
1.5
1.5
2.1
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
3 V/5 V Operation
10 Mbps (BRW and CRW Grades Only)
VDD1 Supply Current
5 V/3 V Operation
IDD1 (10)
5.6
3.0
7.0
4.2
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
3 V/5 V Operation
VDD2 Supply Current
5 V/3 V Operation
IDD2 (10)
3.0
5.6
4.2
7.0
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
3 V/5 V Operation
90 Mbps (CRW Grade Only)
VDD1 Supply Current
5 V/3 V Operation
IDD1 (90)
44
24
62
39
mA
mA
45 MHz logic signal freq.
45 MHz logic signal freq.
3 V/5 V Operation
VDD2 Supply Current
5 V/3 V Operation
IDD2 (90)
24
44
39
62
mA
mA
45 MHz logic signal freq.
45 MHz logic signal freq.
3 V/5 V Operation
For All Models
Input Currents
IIA, IIB, IIC,
IID, IE1, IE2
−10
+0.01
+10 μA
0 V ≤ VIA, VIB, VIC,VID ≤ VDD1 or
VDD2, 0 V ≤ VE1, VE2 ≤ VDD1 or VDD2
Logic High Input Threshold
5 V/3 V Operation
VIH, VEH
2.0
1.6
V
V
3 V/5 V Operation
Logic Low Input Threshold
5 V/3 V Operation
VIL, VEL
0.8
0.4
V
V
V
V
V
V
V
3 V/5 V Operation
Logic High Output Voltages
VOAH, VOBH
,
(VDD1 or VDD2) − 0.1 (VDD1 or VDD2
)
IOx = −20 μA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
V
OCH, VODH
VOAL, VOBL
VOCL, VODL
(VDD1 or VDD2) − 0.4 (VDD1 or VDD2) − 0.2
Logic Low Output Voltages
,
0.0
0.1
0.1
0.4
IOx = 20 μA, VIx = VIxL
0.04
0.2
IOx = 400 μA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
SWITCHING SPECIFICATIONS
ADuM140xARW
Minimum Pulse Width3
Maximum Data Rate4
PW
1000 ns
Mbps
100 ns
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
1
Propagation Delay5
tPHL, tPLH
PWD
50
70
11
5
40
ns
Pulse Width Distortion, |tPLH − tPHL
Change vs. Temperature
Propagation Delay Skew6
Channel-to-Channel Matching7
ADuM140xBRW
|
ps/°C
ns
tPSK
50
50
tPSKCD/tPSKOD
ns
Minimum Pulse Width3
Maximum Data Rate4
Propagation Delay5
PW
100 ns
Mbps
ns
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
10
15
tPHL, tPLH
35
50
Rev. G | Page 9 of 32
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