ADuM1300/ADuM1301
ELECTRICAL CHARACTERISTICS—3 V OPERATION
2.7 V ≤ V
DD1
≤ 3.6 V, 2.7 V ≤ V
DD2
≤ 3.6 V; all min/max specifications apply over the entire recommended operation range, unless other-
wise noted; all typical specifications are at T
A
= 25°C, V
DD1
= V
DD2
= 3.0 V.
Table 2.
Parameter
DC SPECIFICATIONS
Input Supply Current, per Channel, Quiescent
Output Supply Current, per Channel, Quiescent
ADuM1300, Total Supply Current, Three Channels
DC to 2 Mbps
V
DD1
Supply Current
V
DD2
Supply Current
10 Mbps (BRW and CRW Grades Only)
V
DD1
Supply Current
V
DD2
Supply Current
90 Mbps (CRW Grade Only)
V
DD1
Supply Current
V
DD2
Supply Current
ADuM1301, Total Supply Current, Three Channels
DC to 2 Mbps
V
DD1
Supply Current
V
DD2
Supply Current
10 Mbps (BRW and CRW Grades Only)
V
DD1
Supply Current
V
DD2
Supply Current
90 Mbps (CRW Grade Only)
V
DD1
Supply Current
V
DD2
Supply Current
For All Models
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Symbol
I
DDI (Q)
I
DDO (Q)
Min
Typ
0.26
0.11
Max Unit
0.31
0.14
mA
mA
Test Conditions
I
DD1 (Q)
I
DD2 (Q)
I
DD1 (10)
I
DD2 (10)
I
DD1 (90)
I
DD2 (90)
0.9
0.4
3.4
1.1
31
8
1.7
0.7
4.9
1.6
48
13
mA
mA
mA
mA
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
5 MHz logic signal freq.
5 MHz logic signal freq.
45 MHz logic signal freq.
45 MHz logic signal freq.
I
DD1 (Q)
I
DD2 (Q)
I
DD1 (10)
I
DD2 (10)
I
DD1 (90)
I
DD2 (90)
I
IA
, I
IB
, I
IC,
I
E1
, I
E2
V
IH
, V
EH
V
IL
, V
EL
V
OAH
, V
OBH
,
V
OCH
V
OAL
, V
OBL
, V
OCL
–10
1.6
0.7
0.6
2.6
1.8
24
16
1.4
0.9
3.7
2.5
36
23
mA
mA
mA
mA
mA
mA
µA
V
V
V
V
V
V
V
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
5 MHz logic signal freq.
5 MHz logic signal freq.
45 MHz logic signal freq.
45 MHz logic signal freq.
0 ≤ V
IA
, V
IB
, V
IC
≤ V
DD1
or V
DD2
,
0 ≤ V
E1
,V
E2
≤ V
DD1
or V
DD2
+0.01 +10
0.4
V
DD1,
V
DD2
– 0.1 3.0
V
DD1,
V
DD2
– 0.4 2.8
0.0
0.04
0.2
0.1
0.1
0.4
I
Ox
= –20 µA, V
Ix
= V
IxH
I
Ox
= –4 mA, V
Ix
= V
IxH
I
Ox
= 20 µA, V
Ix
= V
IxL
I
Ox
= 400 µA, V
Ix
= V
IxL
I
Ox
= 4 mA, V
Ix
= V
IxL
SWITCHING SPECIFICATIONS
ADuM130xARW
Minimum Pulse Width
Maximum Data Rate
Propagation Delay
Pulse-Width Distortion, |t
PLH
– t
PHL
Propagation Delay Skew
Channel-to-Channel Matching
PW
t
PHL
, t
PLH
PWD
t
PSK
t
PSKCD/OD
1
50
75
1000 ns
Mbps
100 ns
40
ns
50
ns
50
ns
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
Rev. C | Page 5 of 20
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