欢迎访问ic37.com |
会员登录 免费注册
发布采购

ADSP-BF532SBST400 参数 Datasheet PDF下载

ADSP-BF532SBST400图片预览
型号: ADSP-BF532SBST400
PDF下载: 下载PDF文件 查看货源
内容描述: Blackfin㈢嵌入式处理器 [Blackfin㈢ Embedded Processor]
分类和应用: 外围集成电路时钟
文件页数/大小: 60 页 / 3447 K
品牌: AD [ ANALOG DEVICES ]
 浏览型号ADSP-BF532SBST400的Datasheet PDF文件第12页浏览型号ADSP-BF532SBST400的Datasheet PDF文件第13页浏览型号ADSP-BF532SBST400的Datasheet PDF文件第14页浏览型号ADSP-BF532SBST400的Datasheet PDF文件第15页浏览型号ADSP-BF532SBST400的Datasheet PDF文件第17页浏览型号ADSP-BF532SBST400的Datasheet PDF文件第18页浏览型号ADSP-BF532SBST400的Datasheet PDF文件第19页浏览型号ADSP-BF532SBST400的Datasheet PDF文件第20页  
ADSP-BF531/ADSP-BF532/ADSP-BF533
• Trace instruction execution.
• Perform linear or statistical profiling of program execution.
• Fill, dump, and graphically plot the contents of memory.
• Perform source level debugging.
• Create custom debugger windows.
The VisualDSP++ IDDE lets programmers define and manage
software development. Its dialog boxes and property pages let
programmers configure and manage all of the Blackfin develop­
ment tools, including the color syntax highlighting in the
VisualDSP++ editor. This capability permits programmers to:
• Control how the development tools process inputs and
generate outputs
• Maintain a one-to-one correspondence with the tool’s
command line switches
The VisualDSP++ Kernel (VDK) incorporates scheduling and
resource management tailored specifically to address the mem­
ory and timing constraints of DSP programming. These
capabilities enable engineers to develop code more effectively,
eliminating the need to start from the very beginning, when
developing new application code. The VDK features include
threads, critical and unscheduled regions, semaphores, events,
and device flags. The VDK also supports priority-based, pre­
emptive, cooperative, and time-sliced scheduling approaches. In
addition, the VDK was designed to be scalable. If the application
does not use a specific feature, the support code for that feature
is excluded from the target system.
Because the VDK is a library, a developer can decide whether to
use it or not. The VDK is integrated into the VisualDSP++
development environment, but can also be used via standard
command line tools. When the VDK is used, the development
environment assists the developer with many error prone tasks
and assists in managing system resources, automating the gen­
eration of various VDK-based objects, and visualizing the
system state, when debugging an application that uses the VDK.
Use the expert linker to visually manipulate the placement of
code and data on the embedded system. View memory utiliza­
tion in a color coded graphical form, easily move code and data
to different areas of the processor or external memory with the
drag of the mouse, and examine runtime stack and heap usage.
The expert linker is fully compatible with existing linker defini­
tion file (LDF), allowing the developer to move between the
graphical and textual environments.
Analog Devices emulators use the IEEE 1149.1 JTAG test access
port of the ADSP-BF531/ADSP-BF532/ADSP-BF533 processor
to monitor and control the target board processor during emu­
lation. The emulator provides full speed emulation, allowing
inspection and modification of memory, registers, and proces­
sor stacks. Nonintrusive in-circuit emulation is assured by the
use of the processor’s JTAG interface—the emulator does not
affect target system loading or timing.
In addition to the software and hardware development tools
available from Analog Devices, third parties provide a wide
range of tools supporting the Blackfin processor family.
Hardware tools include Blackfin processor PC plug-in cards.
Third party software tools include DSP libraries, real-time oper­
ating systems, and block diagram design tools.
EZ-KIT Lite Evaluation Board
Analog Devices offers a range of EZ-KIT Lite
®
evaluation plat­
forms to use as a cost effective method to learn more about
developing or prototyping applications with Analog Devices
processors, platforms, and software tools. Each EZ-KIT Lite
includes an evaluation board along with an evaluation suite of
the VisualDSP++ development and debugging environment
with the C/C++ compiler, assembler, and linker. Also included
are sample application programs, power supply, and a USB
cable. All evaluation versions of the software tools are limited
for use only with the EZ-KIT Lite product.
The USB controller on the EZ-KIT Lite board connects the
board to the USB port of the user’s PC, enabling the Visu­
alDSP++ evaluation suite to emulate the on-board processor in-
circuit. This permits the customer to download, execute, and
debug programs for the EZ-KIT Lite system. It also allows in-
circuit programming of the on-board flash device to store user-
specific boot code, enabling the board to run as a standalone
unit without being connected to the PC.
With a full version of VisualDSP++ installed (sold separately),
engineers can develop software for the EZ-KIT Lite or any cus­
tom defined system. Connecting one of Analog Devices JTAG
emulators to the EZ-KIT Lite board enables high speed, non-
intrusive emulation.
For evaluation of ADSP-BF531/ADSP-BF532/ADSP-BF533
processors, use the EZ-KIT Lite board available from Analog
Devices. Order part number ADDS-BF533-EZLITE. The board
comes with on-chip emulation capabilities and is equipped to
enable software development. Multiple daughter cards are
available.
DESIGNING AN EMULATOR-COMPATIBLE
PROCESSOR BOARD
The Analog Devices family of emulators are tools that every sys­
tem developer needs to test and debug hardware and software
systems. Analog Devices has supplied an IEEE 1149.1 JTAG test
access port (TAP) on each JTAG processor. The emulator uses
the TAP to access the internal features of the processor, allow­
ing the developer to load code, set breakpoints, observe
variables, observe memory, and examine registers. The proces­
sor must be halted to send data and commands, but once an
operation has been completed by the emulator, the processor
system is set running at full speed with no impact on
system timing.
To use these emulators, the target board must include a header
that connects the processor’s JTAG port to the emulator.
Rev. E |
Page 16 of 60 |
July 2007