ADSP-BF531/ADSP-BF532/ADSP-BF533
FRAME
SYNC
IS
DRIVEN
OUT
DATA0 IS
DRIVEN
OUT
PPI_CLK
POLC = 0
PPI_CLK
POLC = 1
t
t
HOFSPE
POLS = 1
PPI_FS1
POLS = 0
DFSPE
POLS = 1
PPI_FS2
POLS = 0
t
DDTPE
t
HDTPE
PPI_DATA
DATA0
Figure 19. PPI GP Tx Mode with Internal Frame Sync Timing
FRAME
SYNC
IS
SAMPLED
PPI_CLK
POLC = 0
PPI_CLK
POLC = 1
t
HFSPE
t
SFSPE
POLS = 1
PPI_FS1
POLS = 0
DATA0 IS
DRIVEN
OUT
POLS = 1
PPI_FS2
POLS = 0
t
HDTPE
PPI_DATA
DATA0
t
DDTPE
Figure 20. PPI GP Tx Mode with External Frame Sync Timing
Rev. E |
Page 32 of 60 |
July 2007