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ADSP-21065LKS-240 参数 Datasheet PDF下载

ADSP-21065LKS-240图片预览
型号: ADSP-21065LKS-240
PDF下载: 下载PDF文件 查看货源
内容描述: 微电脑DSP [DSP Microcomputer]
分类和应用: 外围集成电路电脑时钟
文件页数/大小: 44 页 / 489 K
品牌: AD [ ANALOG DEVICES ]
 浏览型号ADSP-21065LKS-240的Datasheet PDF文件第8页浏览型号ADSP-21065LKS-240的Datasheet PDF文件第9页浏览型号ADSP-21065LKS-240的Datasheet PDF文件第10页浏览型号ADSP-21065LKS-240的Datasheet PDF文件第11页浏览型号ADSP-21065LKS-240的Datasheet PDF文件第13页浏览型号ADSP-21065LKS-240的Datasheet PDF文件第14页浏览型号ADSP-21065LKS-240的Datasheet PDF文件第15页浏览型号ADSP-21065LKS-240的Datasheet PDF文件第16页  
ADSP-21065L–SPECIFICATIONS
RECOMMENDED OPERATING CONDITIONS
Parameter
V
DD
T
CASE
V
IH
V
IL1
V
IL2
Supply Voltage
Case Operating Temperature
High Level Input Voltage
Low Level Input Voltage
1
Low Level Input Voltage
2
@ V
DD
= max
@ V
DD
= min
@ V
DD
= min
Test
Conditions
C Grade
Min
Max
3.13
–40
2.0
–0.5
–0.5
3.60
+100
V
DD
+ 0.5
0.8
0.7
K Grade
Min
Max
3.13
0
2.0
–0.5
–0.5
3.60
+85
V
DD
+ 0.5
0.8
0.7
Unit
V
∞C
V
V
V
NOTE
See Environmental Conditions for information on thermal specifications.
ELECTRICAL CHARACTERISTICS
Parameter
V
OH
V
OL
I
IH
I
IL
I
ILP
I
OZH
I
OZL
I
OZLS
I
OZLA
I
OZLAR
I
OZLC
C
IN
High Level Output Voltage
3
Low Level Output Voltage
3
High Level Input Current
5
Low Level Input Current
5
Low Level Input Current
6
Three-State Leakage Current
7, 8, 9, 10
Three-State Leakage Current
7
Three-State Leakage Current
8
Three-State Leakage Current
11
Three-State Leakage Current
10
Three-State Leakage Current
9
Input Capacitance
12, 13
Test Conditions
@ V
DD
= min, I
OH
= –2.0 mA
4
@ V
DD
= min, I
OL
= 4.0 mA
4
@ V
DD
= max, V
IN
= V
DD
max
@ V
DD
= max, V
IN
= 0 V
@ V
DD
= max, V
IN
= 0 V
@ V
DD
= max, V
IN
= V
DD
max
@ V
DD
= max, V
IN
= 0 V
@ V
DD
= max, V
IN
= 0 V
@ V
DD
= max, V
IN
= 1.5 V
@ V
DD
= max, V
IN
= 0 V
@ V
DD
= max, V
IN
= 0 V
f
IN
= 1 MHz, T
CASE
= 25∞C, V
IN
= 2.5 V
C and K Grades
Min
Max
2.4
0.4
10
10
150
10
8
150
350
4
1.5
8
Unit
V
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
pF
NOTES
1
Applies to input and bidirectional pins: DATA
31-0
, ADDR
23-0
, BSEL,
RD, WR, SW,
ACK,
SBTS, IRQ
2-0
, FLAG
11-0
,
HBG, CS, DMAR1, DMAR2, BR
2-1
,
ID
2-0
,
RPBA,
CPA,
TFS0, TFS1, RFS0, RFS1,
BMS,
TMS, TDI, TCK,
HBR,
DR0A, DR1A, DR0B, DR1B, TCLK0, TCLK1, RCLK0, RCLK1,
RESET, TRST,
PWM_EVENT0, PWM_EVENT1,
RAS, CAS, SDWE, SDCKE.
2
Applies to input pin CLKIN.
3
Applies to output and bidirectional pins: DATA
31-0
, ADDR
23-0
, MS
3-0
,
RD, WR, SW,
ACK, FLAG
11-0
,
HBG,
REDY,
DMAG1, DMAG2, BR
2-1
,
CPA,
TCLK0,
TCLK1, RCLK0, RCLK1, TFS0, TFS1, RFS0, RFS1, DT0A, DT1A, DT0B, DT1B, XTAL,
BMS,
TDO,
EMU,
BMSTR, PWM_EVENT0, PWM_EVENT1,
RAS, CAS,
DQM,
SDWE,
SDCLK0, SDCLK1,
SDCKE,
SDA10.
4
See Output Drive Currents for typical drive current capabilities.
5
Applies to input pins: ACK,
SBTS, IRQ
2-0
,
HBR, CS, DMAR1, DMAR2,
ID
1-0
, BSEL, CLKIN,
RESET,
TCK (Note that ACK is pulled up internally with 2 kW
during reset in a multiprocessor system, when ID
1-0
= 01 and another ADSP-21065L is not requesting bus mastership.)
6
Applies to input pins with internal pull-ups: DR0A, DR1A, DR0B, DR1B,
TRST,
TMS, TDI.
7
Applies to three-statable pins: DATA
31-0
, ADDR
23-0
,
MS
3-0
,
RD, WR, SW,
ACK, FLAG
11-0
, REDY,
HBG, DMAG
1
,
DMAG
2
,
BMS,
TDO,
RAS, CAS,
DQM,
SDWE,
SDCLK0, SDCLK1,
SDCKE,
SDA10, and
EMU
(Note that ACK is pulled up internally with 2 kW during reset in a multiprocessor system, when ID
1-0
=
01 and another ADSP-21065L is not requesting bus mastership).
8
Applies to three-statable pins with internal pull-ups: DT0A, DT1A, DT0B, DT1B, TCLK0, TCLK1, RCLK0, RCLK1.
9
Applies to
CPA
pin.
10
Applies to ACK pin when pulled up.
11
Applies to ACK pin when keeper latch enabled.
12
Guaranteed but not tested.
13
Applies to all signal pins.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +4.6 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
DD
+ 0.5 V
Output Voltage Swing . . . . . . . . . . . . . . –0.5 V to V
DD
+ 0.5 V
Load Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 pF
Junction Temperature Under Bias . . . . . . . . . . . . . . . . . 130∞C
ESD SENSITIVITY
Storage Temperature Range . . . . . . . . . . . . . –65∞C to +150∞C
Lead Temperature (5 seconds) . . . . . . . . . . . . . . . . . . . 280∞C
*Stresses
greater than those listed above may cause permanent damage to the device.
These are stress ratings only; functional operation of the device at these or any other
conditions greater than those indicated in the operational sections of this specifica-
tion is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADSP-21065L features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
–12–
WARNING!
ESD SENSITIVE DEVICE
REV. C