ADSP-21061/ADSP-21061L
ADSP-21061–SPECIFICATIONS
RECOMMENDED OPERATING CONDITIONS (5 V)
K Grade
Max
Parameter
Test Conditions
Min
Unit
VDD
TCASE
VIH1
VIH2
VIL
Supply Voltage
4.75
0
2.0
2.2
–0.5
5.25
+85
VDD + 0.5
VDD + 0.5
0.8
V
°C
V
V
V
Case Operating Temperature
High Level Input Voltage1
High Level Input Voltage2
Low Level Input Voltage1, 2
@ VDD = max
@ VDD = max
@ VDD = min
NOTES
1Applies to input and bidirectional pins: DATA47-0, ADDR31-0, RD, WR, SW, ACK, SBTS, IRQ2-0, FLAG3-0, HBG, CS, DMAR1, DMAR2, BR6-1, ID2-0, RPBA,
CPA, TFS0, TFS1, RFS0, RFS1, LxDAT3-0, LxCLK, LxACK, EBOOT, LBOOT, BMS, TMS, TDI, TCK, HBR, DR0, DR1, TCLK0, TCLK1, RCLK0, RCLK1.
2Applies to input pins: CLKIN, RESET, TRST.
ELECTRICAL CHARACTERISTICS (5 V)
Parameter
Test Conditions
Min
Max
Unit
VOH
VOL
IIH
IIL
IILP
IOZH
IOZL
IOZHP
IOZLC
IOZLA
IOZLAR
IOZLS
CIN
High Level Output Voltage1
Low Level Output Voltage1
High Level Input Current3, 4
Low Level Input Current3
@ VDD = min, IOH = –2.0 mA2
@ VDD = min, IOL = 4.0 mA2
@ VDD = max, VIN = VDD max
@ VDD = max, VIN = 0 V
@ VDD = max, VIN = 0 V
@ VDD = max, VIN = VDD max
@ VDD = max, VIN = 0 V
@ VDD = max, VIN = VDD max
@ VDD = max, VIN = 0 V
@ VDD = max, VIN = 1.5 V
@ VDD = max, VIN = 0 V
@ VDD = max, VIN = 0 V
4.1
V
V
0.4
10
10
150
10
10
350
1.5
350
4.2
150
4.7
µA
µA
µA
µA
µA
µA
mA
µA
mA
µA
pF
Low Level Input Current4
Three-State Leakage Current5, 6, 7, 8
Three-State Leakage Current5, 9
Three-State Leakage Current9
Three-State Leakage Current7
Three-State Leakage Current10
Three-State Leakage Current8
Three-State Leakage Current6
Input Capacitance11, 12
fIN = 1 MHz, TCASE = 25°C, VIN = 2.5 V
NOTES
11Applies to output and bidirectional pins: DATA47-0, ADDR31-0, MS3-0, RD, WR, PAGE, ADRCLK, SW, ACK, FLAG3-0, TIMEXP, HBG, REDY, DMAG1,
DMAG2, BR6-1, CPA, DT0, DT1, TCLK0, TCLK1, RCLK0, RCLK1, TFS0, TFS1, RFS0, RFS1, LxDAT3-0, LxCLK, LxACK, BMS, TDO, EMU, ICSA.
12See Output Drive Currents section for typical drive current capabilities.
13Applies to input pins: ACK SBTS, IRQ2-0, HBR, CS, DMAR1, DMAR2, ID2-0, RPBA, EBOOT, LBOOT, CLKIN, RESET, TCK. Note that ACK is pulled up
internally with 2 kΩ during reset in a multiprocessor system, when ID2–0 = 001 and another ADSP-2106x is not requesting bus mastership.)
14Applies to input pins with internal pull-ups: DR0, DR1, TRST, TMS, TDI.
15Applies to three-statable pins: DATA47-0, ADDR31-0, MS3-0, RD, WR, PAGE, ADRCLK, SW, ACK, FLAG3-0, REDY, HBG, DMAG1, DMAG2, BMS, BR6–1
,
TFSX, RFSX, TDO, EMU. (Note that ACK is pulled up internally with 2 kΩ during reset in a multiprocessor system, when ID2-0 = 001 and another ADSP-2106x is
not requesting bus mastership.)
16Applies to three-statable pins with internal pull-ups: DT0, DT1, TCLK0, TCLK1, RCLK0, RCLK1.
17Applies to CPA pin.
18Applies to ACK pin when pulled up. (Note that ACK is pulled up internally with 2 kΩ during reset in a multiprocessor system, when ID2-0 = 001 and another
ADSP-21061x is not requesting bus mastership).
19Applies to three-statable pins with internal pull-downs: LxDAT3-0, LxCLK, LxACK.
10Applies to ACK pin when keeper latch enabled.
11Applies to all signal pins.
12Guaranteed but not tested.
Specifications subject to change without notice.
–14–
REV. B
ADI [ ADI ]
