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ADM9240ARU 参数 Datasheet PDF下载

ADM9240ARU图片预览
型号: ADM9240ARU
PDF下载: 下载PDF文件 查看货源
内容描述: 低成本微处理器系统硬件监控 [Low Cost Microprocessor System Hardware Monitor]
分类和应用: 电源电路电源管理电路微处理器光电二极管监控
文件页数/大小: 22 页 / 283 K
品牌: AD [ ANALOG DEVICES ]
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ADM9240
GENERAL DESCRIPTION
INTERNAL REGISTERS OF THE ADM9240
The ADM9240 is a complete system hardware monitor for
microprocessor-based systems. The device communicates with
the system via a serial System Management Bus. The serial bus
controller has two hardwired address lines for device selection
(Pin 1 and Pin 2), a serial data line for reading and writing
addresses and data (Pin 3), and an input line for the serial clock
(Pin 4). All control and programming functions of the ADM9240
are performed over the serial bus.
An on-chip analog-to-digital converter with six multiplexed
analog inputs measures power supply voltages (+12 V, +5 V,
+3.3 V, +2.5 V—Pins 15 to 18) and processor core voltages
(+V
CCP1
and +V
CCP2
—Pins 19 and 14). The ADC also accepts
input from an on-chip bandgap temperature sensor that moni-
tors system ambient temperature.
Two count inputs (Pins 5 and 6) are provided for monitoring
the speed of fans with tachometer outputs. To accommodate
fans with different speeds and different tacho outputs, a divisor
of 1, 2, 4 or 8 can be programmed into the counter.
Five digital inputs (VID4 to VID0—Pins 20 to 24) read the
processor Voltage ID code, while a chassis intrusion input
(Pin 7) is provided to detect unauthorized tampering with the
equipment.
When the ADM9240 monitoring sequence is started, it cycles
sequentially through the measurement of analog inputs and the
temperature sensor, while at the same time the fan speed inputs
are independently monitored. Measured values from these in-
puts are stored in value registers. These can be read out over the
serial bus, or can be compared with programmed limits stored
in the limit registers. The results of out-of-limit comparisons are
stored in the interrupt status registers and will generate an inter-
rupt on the
INT
line (Pin 10).
Any or all of the Interrupt Status Bits can be masked by appro-
priate programming of the Interrupt Mask Register.
A
RESET
input/output (Pin 12) is provided. Pulling this pin
low will reset all ADM9240 internal registers to default values.
The ADM9240 can also be programmed to give a low-going
20 ms reset pulse at this pin.
The ADM9240 contains an on-chip, 8-bit digital-to-analog
converter with an output range of zero to 1.25 V (Pin 11). This
is typically used to implement a temperature-controlled fan by
controlling the speed of a fan dependent upon the temperature
measured by the on-chip temperature sensor.
Testing of board level connectivity is simplified by providing a
NAND tree test function. The AOUT (Pin 11) also doubles as
a NAND test input, while Pin 1 doubles as a NAND tree output.
A brief description of the ADM9240’s principal internal regis-
ters is given below. More detailed information on the function
of each register is given in Tables V to XVII.
Configuration Register:
Provides control and configuration.
Serial Address Register:
Stores the serial bus address of the
ADM9240.
Address Pointer Register:
Contains the address that selects
one of the other internal registers. When writing to the ADM9240,
the first byte of data is always a register address, which is written
to the Address Pointer Register.
Interrupt (INT) Status Registers:
Two registers to provide
status of each Interrupt event.
Interrupt (INT) Mask Registers:
Allow masking of indi-
vidual Interrupt sources.
Temperature Configuration Register:
The configuration of
the temperature interrupt is controlled by the lower three bits of
this register.
VID/Fan Divisor Registers:
The status of the VID0 to VID4
pins of the processor can be written to and read from these
registers. Divisor values for fan-speed measurement are also
stored in one of these registers.
Value and Limit Registers:
The results of analog voltage
inputs, temperature and fan speed measurements are stored in
these registers, along with their limit values.
Analog Output Register:
The code controlling the analog
output DAC is stored in this register.
Chassis Intrusion Clear Register:
A signal latched on the
chassis intrusion pin can be cleared by writing to this register.
–6–
REV. 0