ADM9240
ABSOLUTE MAXIMUM RATINGS*
Positive Supply Voltage (V
CC
) . . . . . . . . . . . . . . . . . . . . . 6.5 V
Voltage on Any Input or Output Pin . . –0.3 V to (V
CC
+ 0.3 V)
(Except Analog Inputs)
16 V V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +16 V
All Other Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . . . +7.5 V
Ground Difference (GNDD–GNDA) . . . . . . . . . . . .
±
300 mV
Input Current At Any Pin . . . . . . . . . . . . . . . . . . . . . . .
±
5 mA
Package Input Current . . . . . . . . . . . . . . . . . . . . . . . .
±
20 mA
Maximum Junction Temperature (T
J
max) . . . . . . . . . . 150°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature, Soldering
Vapor Phase 60 (sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared 15 (sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . +200°C
ESD Rating All Pins Except Pin 15 . . . . . . . . . . . . . . . . 2000 V
ESD Rating Pin 15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 V
Start
Condition
(S)
Bit 7
MSB
(A7)
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
THERMAL CHARACTERISTICS
24-Lead Small Outline Package:
θ
JA
= 50°C/Watt,
θ
JC
= 10°C/Watt
ORDERING GUIDE
Temperature
Range
–40°C to +125°C
Package
Description
Package
Option
Model
ADM9240ARU
24-Lead TSSOP RU-24
PIN CONFIGURATION
Bit 6
(A6)
NTEST_OUT/A0
A1
SDA
PROTOCOL
t
SU;STA
SCL
t
LOW
t
HIGH
1/f
SCL
1
2
3
4
5
6
24
23
22
21
VID0
VID1
VID2
VID3
VID4
t
BUF
SDA
t
r
t
f
SCL
FAN1
FAN2
ADM9240
20
t
HD;STA
Bit 0
LSB
(R/W)
t
SU;DAT
Stop
Condition
(P)
t
HD;DAT
CI
GNDD
+V
CCP1
TOP VIEW
19
(Not to Scale)
18
+2.5V
7
IN
8
9
10
11
17
+3.3V
IN
16
+5V
IN
15
+12V
IN
14
+V
CCP2
13
GNDA
PROTOCOL
Acknowledge
(A)
V
CC
INT
NTEST_IN/AOUT
SCL
RESET
12
SDA
t
VD;DAT
t
SU;STO
Figure 1. Diagram for Serial Bus Timing
–4–
REV. 0
AD [ ANALOG DEVICES ]
