ADM706P/ADM706R/ADM706S/ADM706T, ADM708R/ADM708S/ADM708T Data Sheet
APPLICATIONS INFORMATION
A typical operating circuit is shown in Figure 20. The unregulated
dc input supply is monitored using the PFI input via the resistive
divider network. Resistor R1 and Resistor R2 are to be selected
so that when the supply voltage drops below the desired level
(for example, 5 V), the voltage on PFI drops below the 1.25 V
threshold, thereby generating an interrupt to the microprocessor.
Monitoring the preregulator input gives additional time to
execute an orderly shutdown procedure before power is lost.
MONITORING ADDITIONAL SUPPLY LEVELS
It is possible to use the power-fail comparator to monitor a second
supply as shown in Figure 22. The two sensing resistors, R1 and
R2, are selected such that the voltage on PFI drops below 1.25 V at
PFO
the minimum acceptable input supply. The
output can be
MR
connected to the
input so that a reset is generated when the
supply drops out of tolerance. In this case, if either supply drops
out of tolerance, a reset is generated.
UNREGULATED
ADM666A
V
+3V/+3.3V
DC
X
IN
OUT
GND
3.3V
V
CC
RESET
RESET
R1
R2
V
V
CC
CC
MICROPROCESSOR
WDI
PFO
ADM706R/
ADM706S/
ADM706T
RESET
RESET
WDI
I/O LINE
ADM706R/
ADM706S/
ADM706T
PFI
MR
MICROPROCESSOR
NMI
GND
PFI
MR
WDO
PFO
INTERRUPT
GND
Figure 22. Monitoring 3 V/3.3 V and an Additional Supply, VX
GND
MANUAL
RESET
MICROPROCESSORS WITH BIDIRECTIONAL RESET
To prevent contention for microprocessors with a bidirectional
reset line, a current limiting resistor is to be inserted between
the ADM706R/ADM706S/ADM706T, ADM708R/ADM708S/
Figure 20. Typical Application Circuit
Microprocessor activity is monitored using the WDI input. This
is driven using an output line from the processor. The software
routines toggle this line at least once every 1.6 seconds. If a problem
RESET
ADM708T
output pin and the microprocessor reset pin.
This limits the current to a safe level if there are conflicting output
reset levels. A suitable resistor value is 4.7 kΩ. If the reset output is
required for other uses, it should be buffered as shown in Figure 23.
WDO
occurs and this line is not toggled,
goes low and a nonmask-
able interrupt is generated. This interrupt routine is to be used
to clear the problem.
BUFFERED
+3V/+3.3V
RESET
If, in the event of inactivity on the WDI line, a system reset is
V
CC
WDO
required, the
shown in Figure 21.
output is to be connected to the input as
ADM706R/ADM706S/
ADM706T/ADM708R/
ADM708S/ADM708T
MICROPROCESSOR
RESET
RESET
GND
RESET
RESET
GND
ADM706R/
ADM706S/
ADM706T
I/O LINE
WDI
RESET
Figure 23. Bidirectional Input/Output
PFI
MR
MICROPROCESSOR
WDO
GND
RESET
Figure 21.
from WDO
Rev. D | Page 12 of 16
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