ADM690–ADM695
P IN CO NFIGURATIO NS
V
1
2
3
4
5
6
7
8
RESET
16
BATT
V
15 RESET
OUT
ADM691
ADM693
ADM695
V
14
13
12
WDO
V
OUT
1
8
7
V
CC
ADM690
ADM692
ADM694
BATT
GND
BATT ON
LOW LINE
OSC IN
V
CE
IN
RESET
WDI
2
3
CC
TOP VIEW
(Not to Scale)
CE
GND
PFI
6
5
OUT
TOP VIEW
(Not to Scale)
11 WDI
10 PFO
PFO
4
OSC SEL
9
PFI
P RO D UCT SELECTIO N GUID E
P art
Num ber
Nom inal Reset
Tim e
Nom inal VCC
Reset Threshold
Nom inal Watchdog
Tim eout P eriod
Battery Backup
Switching
Base D rive
Ext P NP
Chip Enable
Signals
ADM690
ADM691
ADM692
ADM693
ADM694
ADM695
50 ms
50 ms or ADJ
50 ms
50 ms or ADJ
200 ms
200 ms or ADJ
4.65 V
4.65 V
4.4 V
4.4 V
4.65 V
4.65 V
1.6 s
Yes
Yes
Yes
Yes
Yes
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
100 ms, 1.6 s, ADJ
1.6 s
100 ms, 1.6 s, ADJ
1.6 s
100 ms, 1.6 s, ADJ
CIRCUIT INFO RMATIO N
Batter y Switchover Section
If the continuous output current requirement at VOUT exceeds
100 mA or if a lower VCC–VOUT voltage differential is desired,
an external PNP pass transistor may be connected in parallel
with the internal transistor. T he BAT T ON output (ADM691/
ADM693/ADM695) can directly drive the base of the external
transistor.
T he battery switchover circuit compares VCC to the VBAT T
input, and connects VOUT to whichever is higher. Switchover
occurs when VCC is 50 mV higher than VBAT T as VCC falls, and
when VCC is 70 mV greater than VBAT T as VCC rises. T his
20 mV of hysteresis prevents repeated rapid switching if VCC
falls very slowly or remains nearly equal to the battery voltage.
A 20 Ω MOSFET switch connects the VBAT T input to VOUT
during battery backup. T his MOSFET has very low input-to-
output differential (dropout voltage) at the low current levels
required for battery back up of CMOS RAM or other low
power CMOS circuitry. T he supply current in battery back up
is typically 0.6 µA.
T he ADM690/ADM691/ADM694/ADM695 operates with
battery voltages from 2.0 V to 4.25 V and the ADM692/ADM693
operates with battery voltages from 2.0 V to 4.0 V. High value
capacitors, either standard electrolytic or the farad size double
layer capacitors, can also be used for short-term memory back
up. A small charging current of typically 10 nA (0.1 µA max)
flows out of the VBAT T terminal. T his current is useful for
maintaining rechargeable batteries in a fully charged condition.
T his extends the life of the back up battery by compensating
for its self discharge current. Also note that this current poses
no problem when lithium batteries are used for back up since
the maximum charging current (0.1 µA) is safe for even the
smallest lithium cells.
Figure 1. Battery Switchover Schem atic
During normal operation with VCC higher than VBAT T, VCC is in-
ternally switched to VOUT via an internal PMOS transistor
switch. T his switch has a typical on-resistance of 1.5 Ω and can
supply up to 100 mA at the VOUT terminal. VOUT is normally
used to drive a RAM memory bank which may require instanta-
neous currents of greater than 100 mA. If this is the case then a
bypass capacitor should be connected to VOUT . T he capacitor
will provide the peak current transients to the RAM. A capaci-
tance value of 0.1 µF or greater may be used.
If the battery-switchover section is not used, VBAT T should be
connected to GND and VOUT should be connected to VCC
.
REV. A
–5–
ADI [ ADI ]
