ADM485
TIMING SPECIFICATIONS
VCC = 5 V 5ꢀ, all specifications TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
Min Typ Max Unit Test Conditions/Comments
DRIVER
Propagation Delay Input to Output, tPLH, tPHL
Driver Output to OUTPUT, tSKEW
Driver Rise/Fall Time, tR, tF
Driver Enable to Output Valid
Driver Disable Timing
Matched Enable Switching |tZH − tZL|
Matched Disable Switching |tHZ − tLZ|
RECEIVER
2
10
1
15
5
ns
ns
ns
ns
ns
ns
ns
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 22
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 22
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 22
RL = 110 Ω, CL = 50 pF, see Figure 23
RL = 110 Ω, CL = 50 pF, see Figure 23
RL = 110 Ω, CL = 50 pF, see Figure 231
RL = 110 Ω, CL = 50 pF, see Figure 231
8
15
25
25
2
10
10
0
0
2
Propagation Delay Input to Output, tPLH, tPHL
8
15
30
5
20
20
ns
ns
ns
ns
ns
ns
CL = 15 pF, see Figure 24
CL = 15 pF, see Figure 24
CL = 15 pF, RL = 1 kΩ, see Figure 25
CL = 15 pF, RL = 1 kΩ, see Figure 25
Skew |tPLH − tPHL
|
Receiver Enable, tZH, tZL
Receiver Disable, tHZ, tLZ
Tx Pulse Width Distortion
Rx Pulse Width Distortion
5
5
1
1
1 Guaranteed by characterization.
Rev. F | Page 4 of 16
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