ADM485
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
RO
RE
DE
DI
1
2
3
4
8
7
6
5
V
CC
B
ADM485
TOP VIEW
(Not to Scale)
A
GND
Figure 2. Pin Configuration
Table 6. Pin Function Descriptions
Pin No. Mnemonic Function
1
2
3
RO
RE
Receiver Output. When enabled, if A is greater than B by 200 mV, RO is high. If A is less than B by 200 mV, RO is low.
Receiver Output Enable. A low level enables the receiver output, RO. A high level places it in a high impedance state.
DE
Driver Output Enable. A high level enables the driver differential outputs, A and B. A low level places it in a high
impedance state.
4
DI
Driver Input. When the driver is enabled, a logic low on DI forces A low and B high, while a logic high on DI forces
A high and B low.
5
6
7
8
GND
A
B
Ground Connection, 0 V.
Noninverting Receiver Input A/Driver Output A.
Inverting Receiver Input B/Driver Output B.
Power Supply, 5 V 5ꢀ.
VCC
Rev. F | Page 6 of 16
ADI [ ADI ]
