ADM485E/ADM487E/ADM1487E
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
RO
1
RE
2
DE
3
DI
4
ADM485E/
ADM487E/
ADM1487E
TOP VIEW
(Not to Scale)
8
7
6
5
V
CC
B
A
06356-002
GND
Figure 2. Pin Configuration
Table 6. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
Mnemonic
RO
RE
DE
DI
GND
A
B
V
CC
Description
Receiver Output. When enabled, if A > B by 200 mV, then RO = high. If A < B by 200 mV, then RO = low.
Receiver Output Enable. A low level enables the RO; a high level places it in a high impedance state.
Driver Output Enable. A high level enables the driver differential outputs, Pin A and Pin B; a low level places it
in a high impedance state.
Driver Input. When the driver is enabled, a Logic L = low on DI forces A low and B high; a Logic H = high on DI
forces Pin A high and Pin B low.
Ground Connection (0 V).
Noninverting Receiver Input A/Driver Output A.
Inverting Receiver Input B/Driver Output B.
Power Supply (5 V ± 5%).
Rev. 0 | Page 7 of 16
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