ASM485ꢁ/ASM487ꢁ/ASM±487ꢁ
TꢁET CIRCUITE ANS EWITCHING CHARACTꢁRIETICE
Y
R
L
V
CC
V
OD
R
= 500Ω
L
S1
0V OR 5V
OUT
V
D
OC
R
L
C
L
Z
Figure 18. Driver DC Test Load
GENERATOR
50Ω
V
DD
5V
0V
DE
DE
V
/2
C
C
CC
L
A
DI
V
R
L
tDZL,
tDZL(SHDN)
OD
tDLZ
B
V
CC
OUT
L
2.3V
0.5V
V
OL
Figure 19. Driver Timing Test Circuit
Figure 22. Driver Enable and Disable Times (tDZL, tDLZ, tDZL(SHDN)
)
RECEIVER
OUTPUT
B
A
V
ATE
ID
R
5V
DI
1.5V
0V
tDPLH
tDPHL
1/2 V
O
Figure 23. Receiver Propagation Delay Test Circuit
B
A
V
O
+1V
–1V
A
B
1/2V
O
V
= V (A) – V (B)
DIFF
tRPLH
tRPHL
V
O
V
80%
80%
DIFF
0V
–V
20%
20%
tDF
V
OH
O
RO
tDR
1.5V
V
OL
tSKEW
= tDPLH – tDPHL
THE RISE TIME AND FALL TIME OF INPUT A AND INPUT B < 4ns
Figure 24. Receiver Propagation Delays
Figure 20. Driver Propagation Delays
S1
0 OR 5V
D
OUT
C
L
R
= 500Ω
L
GENERATOR
50Ω
5V
0V
DE
1.5V
tDZH,
tDZH(SHDN)
0.5V
V
OH
OUT
2.3V
0V
tDHZ
Figure 21. Driver Enable and Disable Times (tDHZ, tDZH, tDZH(SHDN)
)
Rev. 0 | Page 11 of 16
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