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ADM2209EARUZ-REEL7 参数 Datasheet PDF下载

ADM2209EARUZ-REEL7图片预览
型号: ADM2209EARUZ-REEL7
PDF下载: 下载PDF文件 查看货源
内容描述: [World's Smallest Dual-Port 6 Tx/10 Rx RS-232]
分类和应用: 驱动光电二极管接口集成电路驱动器
文件页数/大小: 13 页 / 186 K
品牌: ADI [ ADI ]
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ADM2209E  
GENERAL DESCRIPTION  
The inverted output V– goes to GND. All transmitter outputs  
are disabled and receivers R1 through R4 on each port are three-  
stated. The remaining receiver on each port (R5) remains fully  
active.  
The ADM2209E is a rugged dual-port RS-232 line driver/re-  
ceiver that operates from a single, +12 V supply, thus removing  
the need for a –12 V power supply. It contains ten receivers and  
six drivers, and provides a one-chip solution for both serial ports  
in desktop or portable personal computers.  
The standby current ISTBY remains less than 200 µA in this  
mode.  
Features include low power consumption, high transmission  
rates and compatibility with the EU directive on electromagnetic  
compatibility. EM compatibility includes protection against  
radiated and conducted interference including high levels of  
electrostatic discharge.  
V
(12V)  
V
(5V)  
DD  
STBY  
INTERNAL  
SHUTDOWN SIGNAL  
All RS-232 inputs and outputs contain protection against  
electrostatic discharges up to ±15 kV and electrical fast tran-  
sients up to ±2 kV. This ensures compliance to IE1000-4-2 and  
IEC1000-4-4 requirements.  
Figure 21. Standby Detection Circuit  
This device is ideally suited for operation in electrically harsh  
environments or where RS-232 cables are frequently being  
plugged/unplugged. They are also immune to high RF field  
strengths without special shielding precautions. Emissions are  
also controlled to within very strict limits.  
Charge Pump Capacitors And Supply Decoupling  
For proper operation of the charge pump, the capacitors should  
have an equivalent series resistance (ESR) less than 1 . As the  
charge pump draws current pulses from VDD, the VDD decou-  
pling capacitor should also have low ESR. The V– decoupling  
capacitor and reservoir capacitor should also have low ESR  
because they determine how effectively ESD pulses are clamped  
to VDD or V– by the on-chip clamp diodes. Tantalum or mono-  
lithic ceramic capacitors are suitable for these components. If  
using tantalum capacitors, do not forget to observe polarity.  
A novel feature of this device is that one receiver (R5) in each  
port can be kept active by a low-current, +3 V/+5 V power  
supply, while the rest of the system is powered down. This al-  
lows the system to be awakened when peripheral devices begin  
to communicate with it.  
Transmitter (Driver) Section  
CIRCUIT DESCRIPTION  
The internal circuitry consists of four main sections. These are:  
The drivers convert 5 V logic input levels into EIA-232 output  
levels. With VDD = +12 V and driving an EIA-232 load, the  
output voltage swing is typically ±9 V.  
1. A charge pump dc-to-dc converter  
2. Logic (3 V/5 V)-to-EIA-232 transmitters  
3. EIA-232-to-logic receivers  
Unused inputs may be left unconnected, as an internal 400 kΩ  
pull-up resistor pulls them high, forcing the outputs into a low  
state. The input pull-up resistors typically source 10 µA when  
grounded, so unused inputs should either be connected to VSTBY  
or left unconnected in order to minimize power consumption.  
4. Transient protection circuit on all I-O lines  
Charge Pump DC-DC Converter  
The dc-dc converter generates a negative supply voltage from  
the +12 V supply, thus removing the need for a separate –12 V  
rail. It consists of an on-chip 200 kHz oscillator, switching ma-  
trix and two external capacitors, as shown in Figure 20.  
Receiver Section  
The receivers are inverting level shifters that accept EIA-232  
input levels and translate them into 5 V logic output levels. The  
inputs have internal 5 kpull-down resistors to ground and are  
also protected against overvoltages of up to ±30 V. The guaran-  
teed switching thresholds are 0.4 V minimum and 2.4 V maxi-  
mum. Unconnected inputs are pulled to 0 V by the internal  
5 kpull-down resistor. This, therefore, results in a Logic 1  
output level for unconnected inputs or for inputs connected to  
GND.  
S3  
S1  
S2  
V
+12V  
DD  
GND  
C2–  
+
+
C1  
C2  
S4  
GND  
INTERNAL  
OSCILLATOR  
The receivers have Schmitt trigger input with a hysteresis level  
of 0.25 V. This ensures error-free reception for both noisy in-  
puts and for inputs with slow transition times.  
Figure 20. Charge Pump DC-DC Converter  
When S1 and S2 are closed, S3 and S4 are open, and C1 charges  
to +12 V. S1 and S2 are then opened, while S3 and S4 are  
closed to connect C1 across C2, dumping charge into C2. Since  
the positive terminal of C2 is at ground, a negative voltage will  
be built up on its negative terminal with each cycle of the oscil-  
lator. This voltage depends on the current drawn from C2. If  
the current is small, the voltage will be close to –12 V, but will  
fall as the current drawn increases.  
HIGH BAUD RATE  
The ADM2209E features high slew rates permitting data trans-  
mission at rates well in excess of the EIA-232-E specifications.  
RS-232 levels are maintained at data rates up to 920 kb/s. This  
allows for high speed data links between two terminals and,  
indeed, is suitable for the new generation modem standards.  
Standby Operation  
ESD/EFT TRANSIENT PROTECTION SCHEME  
The ADM2209E automatically enters a standby or shutdown  
mode when the VDD power supply is removed. An on-chip com-  
parator circuit generates an internal shutdown signal. This sig-  
nal disables the internal oscillator and hence the charge pump.  
The ADM2209E uses protective clamping structures on all in-  
puts and outputs, which clamps the voltage to a safe level and  
dissipates the energy present in ESD (Electrostatic) and EFT  
–8–  
REV. 0  
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