ADM1026
9. The slave asserts an ACK on the SDA after each data byte.
10. The master sends a packet error checking (PEC ) byte.
11. The ADM1026 checks the PEC byte and issues an ACK if
correct. If incorrect (NACK), the master resends the data
bytes.
Because the EEPROM consists of 128 pages of 64 bytes, the
EEPROM page address consists of the EEPROM address high
byte (from 80h to 9Fh) and the two MSBs of the low byte. The
lower six bits of the EEPROM address (low byte only) specify
addresses within a page and are ignored during an erase
operation.
12. The master asserts a stop condition on the SDA to end the
transaction.
1
2
3
4
5
6
7
8
9
10
EEPROM
ADDRESS
HIGH BYTE
(80h TO 9Fh)
EEPROM
ADDRESS
LOW BYTE
(00h TO FFh)
COMMAND
A0h BLOCK A
WRITE
SLAVE
ADDRESS
ARBITRARY
DATA
SLAVE
ADDRESS
DATA
32
BYTE
COUNT
S
W
A
A
A
A
Y
S
W
A
A DATA 1 A DATA 2 A
A
PEC
A
P
Figure 22. EEPROM Page Erasure
Figure 24. Block Write to EEPROM or RAM
Page erasure takes approximately 20 ms. If the EEPROM is
accessed before erasure is complete, the ADM1026 responds
with No Acknowledge.
When performing a block write to EEPROM, Bit 1 of EEPROM
Register 3 must be set.
Unlike some EEPROM devices that limit block writes to within
a page boundary, there is no limitation on the start address
when performing a block write to EEPROM, except:
Last, this protocol is used to write a single byte of data to
EEPROM. In this case, the command byte is the high byte of the
EEPROM address from 80h to 9Fh. The first data byte is the low
byte of the EEPROM address, and the second data byte is the
actual data. Bit 1 of EEPROM Register 3 must be set. This is
illustrated in Figure 23.
•
There must be at least 32 locations from the start address
to the highest EEPROM address (9FFF) to avoid writing to
invalid addresses.
1
2
3
4
5
6
7
8
9
10
•
If the addresses cross a page boundary, both pages must be
erased before programming.
EEPROM
ADDRESS
HIGH BYTE
(80h TO 9Fh)
EEPROM
ADDRESS
LOW BYTE
(00h TO FFh)
SLAVE
ADDRESS
DATA
S
W
A
A
A
A
Y
ADM1026 Read Operations
Figure 23. Single-Byte Write to EEPROM
The ADM1026 uses the SMBus read protocols described here.
Block Write
Receive Byte
In this operation, the master device writes a block of data to a
slave device. The start address for a block write must have been
set previously. In the case of the ADM1026, this is done by a
Send Byte operation to set a RAM address or by a write
byte/word operation to set an EEPROM address.
In this operation, the master device receives a single byte from a
slave device as follows:
1. The master device asserts a start condition on the SDA.
2. The master sends the 7-bit slave address followed by the
read bit (high).
3. The addressed slave device asserts an ACK on the SDA.
4. The master receives a data byte.
1. The master device asserts a start condition on the SDA.
2. The master sends the 7-bit slave address followed by the
write bit (low).
5. The master asserts a NO ACK on the SDA.
6. The master asserts a stop condition on the SDA to end the
transaction.
3. The addressed slave device asserts an ACK on the SDA.
4. The master sends a command code that tells the slave
device to expect a block write. The ADM1026 command
code for a block write is A0h (10100000).
In the ADM1026, the receive byte protocol is used to read a
single byte of data from a RAM or EEPROM location whose
address has previously been set by a send byte or write
byte/word operation. Figure 25 shows this. When reading from
EEPROM, Bit 0 of EEPROM Register 3 must be set.
5. The slave asserts an ACK on the SDA.
6. The master sends a data byte (20h) that tells the slave
device that 32 data bytes are being sent to it. The master
should always send 32 data bytes to the ADM1026.
7. The slave asserts an ACK on the SDA.
1
2
3
4
5
6
8. The master sends 32 data bytes.
SLAVE
ADDRESS
S
R
A
A
P
DATA
Figure 25. Single-Byte Read from EEPROM or RAM
Rev. A | Page ±5 of 56
ADI [ ADI ]
