ADG508F/ADG509F
THEORY OF OPERATION
The
multiplexers are capable of withstand-
ing overvoltages from −40 V to +55 V, irrespective of whether the
power supplies are present or not. Each channel of the multiplexer
consists of an n-channel MOSFET, a p-channel MOSFET, and an
n-channel MOSFET, connected in series. When the analog input
exceeds the power supplies, one of the MOSFETs will saturate
limiting the current. The current during a fault condition is
determined by the load on the output. Figure 17 illustrates
the channel architecture that enables these multiplexers to
withstand continuous overvoltages.
When an analog input of V
SS
+ 2.2 V to V
DD
− 2.2 V (output
loaded, 1 mA) is applied to the
the
multiplexer behaves as a standard multiplexer, with spec-
ifications similar to a standard multiplexer, for example,
the on-resistance is 390 Ω maximum. However, when an
overvoltage is applied to the device, one of the three
MOSFETs saturate.
for the various overvoltage situations. When the analog input
applied to an on channel approaches the positive power supply
line, the n-channel MOSFET saturates because the voltage on
the analog input exceeds the difference between V
DD
and the
n-channel threshold voltage (V
TN
). When a voltage more nega-
tive than V
SS
is applied to the multiplexer, the p-channel
MOSFET will saturate because the analog input is more
negative than the difference between V
SS
and the p-channel
threshold voltage (V
TP
). Because V
TN
is nominally 1.4 V and
V
TP
−1.4 V, the analog input range to the multiplexer is limited
to V
SS
+ 1.4 V to V
DD
– 1.4 V (output open circuit) when a
±15 V power supply is used.
When the power supplies are present but the channel is off,
again either the p-channel MOSFET or one of the n-channel
MOSFETs will remain off when an overvoltage occurs.
Finally, when the power supplies are off, the gate of each
MOSFET will be at ground. A negative overvoltage switches
on the first n-channel MOSFET but the bias produced by the
overvoltage causes the p-channel MOSFET to remain turned
off. With a positive overvoltage, the first MOSFET in the series
will remain off because the gate to source voltage applied to this
MOSFET is negative.
During fault conditions (power supplies off), the leakage
current into and out of the
is limited to
a few microamps. This protects the multiplexer and succeeding
circuitry from over stresses as well as protecting the signal
sources which drive the multiplexer. Also, the other channels
of the multiplexer will be undisturbed by the overvoltage and
will continue to operate normally.
+55V
OVERVOLTAGE
n-CHANNEL
MOSFET
SATURATES
V
DD
Q1
Q2
Q3
V
SS
Figure 17. +55 V Overvoltage Input to the On Channel
–40V
OVERVOLTAGE
n-CHANNEL
MOSFET
IS ON
V
SS
Q1
Q2
Q3
V
DD
Figure 18. −40 V Overvoltage on an Off Channel with
Multiplexer Power On
+55V
OVERVOLTAGE
n-CHANNEL
MOSFET IS
OFF
Q1
Q2
Q3
Figure 19. +55 V Overvoltage with Power Off
–40V
OVERVOLTAGE
n-CHANNEL
MOSFET IS
ON
Q1
Q2
Q3
Figure 20. −40 V Overvoltage with Power Off
Rev. F | Page 11 of 20
00035-020
p-CHANNEL
MOSFET IS
OFF
00035-019
00035-018
p-CHANNEL
MOSFET
SATURATES
00035-017
AD [ ANALOG DEVICES ]
