ADG408/ADG409
PIN CONFIGURATIONS (DIP/SOIC/TSSOP)
TERMINOLOGY
VDD
VSS
Most positive power supply potential.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
16
A0
EN
A1
A0
EN
A1
Most negative power supply potential in dual
supplies. In single supply applications, it may
be connected to ground.
15 GND
A2
V
14
13
12
11
10
9
V
DD
V
GND
SS
SS
ADG408
TOP VIEW
(Not to Scale)
S1A
S1B
S2B
S3B
S4B
DB
S1
V
ADG409
TOP VIEW
(Not to Scale)
DD
GND
RON
Ground (0 V) reference.
S2A
S3A
S4A
DA
S2
S3
S4
D
S5
S6
S7
S8
Ohmic resistance between D and S.
∆RON
Difference between the RON of any two
channels.
IS (OFF)
ID (OFF)
ID, IS (ON)
VD (VS)
Source leakage current when the switch is off.
Drain leakage current when the switch is off.
Channel leakage current when the switch is on.
Analog voltage on terminals D, S.
ADG408 Truth Table
ON
SWITCH
A2
A1
A0
EN
CS (OFF)
Channel input capacitance for “OFF”
condition.
X
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
NONE
1
2
3
4
5
6
7
8
C
D (OFF)
Channel output capacitance for “OFF”
condition.
CD, CS (ON) “ON” switch capacitance.
CIN
Digital input capacitance.
tON (EN)
Delay time between the 50% and 90% points of
the digital input and switch “ON” condition.
t
OFF (EN)
Delay time between the 50% and 90% points of
the digital input and switch “OFF” condition.
ADG409 Truth Table
tTRANSITION
Delay time between the 50% and 90% points of
the digital inputs and the switch “ON” condition
when switching from one address state to another.
ON SWITCH
PAIR
Al
A0
EN
X
0
0
1
1
X
0
1
0
1
0
1
1
1
1
NONE
tOPEN
“OFF” time measured between the 80% point
of both switches when switching from one
address state to another.
1
2
3
4
VINL
VINH
Maximum input voltage for Logic “0.”
Minimum input voltage for Logic “1.”
Input current of the digital input.
IINL (IINH
Crosstalk
)
A measure of unwanted signal which is coupled
through from one channel to another as a result
of parasitic capacitance.
Off Isolation A measure of unwanted signal coupling through
an “OFF” channel.
Charge
Injection
A measure of the glitch impulse transferred
from the digital input to the analog output
during switching.
IDD
ISS
Positive supply current.
Negative supply current.
REV. A
–5–
ADI [ ADI ]
