ADG408/ADG409
PIN CONFIGURATIONS (DIP/SOIC/TSSOP)
TERMINOLOGY
V
DD
A0
1
EN
2
V
SS 3
S1
4
16
A1
15
A2
14
GND
Most positive power supply potential.
Most negative power supply potential in dual
supplies. In single supply applications, it may
be connected to ground.
Ground (0 V) reference.
Ohmic resistance between D and S.
Difference between the R
ON
of any two
channels.
Source leakage current when the switch is off.
Drain leakage current when the switch is off.
Channel leakage current when the switch is on.
Analog voltage on terminals D, S.
Channel input capacitance for “OFF”
condition.
Channel output capacitance for “OFF”
condition.
“ON” switch capacitance.
Digital input capacitance.
Delay time between the 50% and 90% points of
the digital input and switch “ON” condition.
Delay time between the 50% and 90% points of
the digital input and switch “OFF” condition.
Delay time between the 50% and 90% points of
the digital inputs and the switch “ON” condition
when switching from one address state to another.
“OFF” time measured between the 80% point
of both switches when switching from one
address state to another.
Maximum input voltage for Logic “0.”
Minimum input voltage for Logic “1.”
Input current of the digital input.
A measure of unwanted signal which is coupled
through from one channel to another as a result
of parasitic capacitance.
A measure of unwanted signal coupling through
an “OFF” channel.
A measure of the glitch impulse transferred
from the digital input to the analog output
during switching.
Positive supply current.
Negative supply current.
A0
1
EN
2
V
SS 3
S1A
4
16
A1
15
GND
14
V
DD
V
SS
ADG408
13
V
DD
TOP VIEW
S2
5
(Not to Scale)
12
S5
S3
6
S4
7
D
8
11
S6
10
S7
9
ADG409
13
S1B
TOP VIEW
S2A
5
(Not to Scale)
12
S2B
S3A
6
S4A
7
DA
8
11
S3B
10
S4B
9
GND
R
ON
∆R
ON
I
S
(OFF)
S8
DB
ADG408 Truth Table
I
D
(OFF)
ON
SWITCH
NONE
1
2
3
4
5
6
7
8
I
D
, I
S
(ON)
V
D
(V
S
)
C
S
(OFF)
C
D
(OFF)
C
D
, C
S
(ON)
C
IN
t
ON
(EN)
t
OFF
(EN)
A2
X
0
0
0
0
1
1
1
1
A1
X
0
0
1
1
0
0
1
1
A0
X
0
1
0
1
0
1
0
1
EN
0
1
1
1
1
1
1
1
1
ADG409 Truth Table
Al
X
0
0
1
1
A0
X
0
1
0
1
EN
0
1
1
1
1
ON SWITCH
PAIR
NONE
1
2
3
4
t
TRANSITION
t
OPEN
V
INL
V
INH
I
INL
(I
INH
)
Crosstalk
Off Isolation
Charge
Injection
I
DD
I
SS
REV. A
–5–
AD [ ANALOG DEVICES ]
