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ADA4637-1ACPZ-RL 参数 Datasheet PDF下载

ADA4637-1ACPZ-RL图片预览
型号: ADA4637-1ACPZ-RL
PDF下载: 下载PDF文件 查看货源
内容描述: 30 V ,高速,低噪声,低偏置电流 [30 V, High Speed, Low Noise, Low Bias Current]
分类和应用:
文件页数/大小: 20 页 / 761 K
品牌: ADI [ ADI ]
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ADA4627-1/ADA4637-1  
Data Sheet  
THEORY OF OPERATION  
The ADA4627-1 is a high speed, unity gain stable amplifier with  
excellent dc characteristics. The ADA4637-1 is a decompensated  
version that is stable at a gain of 5 or greater. The typical offset  
voltage of 70 µV allows the amplifiers to be easily configured for  
high gains without the risk of excessive output voltage errors. The  
small temperature drift of 2 µV/°C ensures a minimum offset  
voltage error over the entire temperature range of −40°C to  
+125°C, making the amplifiers ideal for a variety of sensitive  
measurement applications in harsh operating environments.  
use the offset adjust pins, especially for offset adjust of a  
complete signal chain. Signal chain offset can be addressed with  
an auto-zero amplifier used to form a composite amplifier; or, if  
the ADA4627-1 or the ADA4637-1 is in an inverting amplifier  
stage, it can be modified easily to add a potentiometer (see  
Figure 48). The LFCSP package does not have offset adjust pins.  
R
F
R
IN  
2
3
INPUT VOLTAGE RANGE  
6
+
OUT  
ADA4627-1  
+
V
The ADA4627-1/ADA4637-1 are not rail-to-rail input  
amplifiers; therefore, care is required to ensure that both inputs  
do not exceed the input voltage range. Under normal negative  
feedback operating conditions, the amplifier corrects its output  
to ensure that the two inputs are at the same voltage. However,  
if either input exceeds the input voltage range, the loop opens,  
and large currents begin to flow through the ESD protection  
diodes in the amplifier.  
V
IN  
+V  
S
499kΩ  
499kΩ  
100kΩ  
0.1µF  
200Ω  
–V  
S
Figure 48. Alternate Offset Null Circuit for Inverting Stage  
INPUT BIAS CURRENT  
These diodes are connected between the inputs and each supply  
rail to protect the input transistors against an electrostatic discharge  
event, and they are normally reverse-biased. However, if the input  
voltage exceeds the supply voltage, these ESD diodes can become  
forward-biased. Without current limiting, excessive amounts  
of current can flow through these diodes, causing permanent  
damage to the device. If inputs are subject to overvoltage, insert  
appropriate series resistors to limit the diode current to less  
than 5 mA.  
Because the ADA4627-1/ADA4637-1 have a JFET input stage,  
the input bias current, due to the reverse-biased junction, has  
a leakage current that approximately doubles every 10°C. The  
power dissipation of the part, combined with the thermal resistance  
of the package, results in the junction temperature increasing  
up 20 degrees to 30 degrees Celsius above ambient. This  
parameter is tested with high speed ATE equipment, which does  
not result in the die temperature reaching equilibrium. This is  
correlated with bench measurements to match the guaranteed  
maximum at room temperature shown in Table 2.  
INPUT OFFSET VOLTAGE ADJUST RANGE  
The input current can be reduced by keeping the temperature as  
low as possible and using a light load on the output.  
The ADA4627-1/ADA4637-1 SOIC packages have offset  
adjust pins for compatibility with some existing designs. The  
recommended offset nulling circuit is shown in Figure 47.  
NOISE CONSIDERATIONS  
+V  
S
The JFET input stage offers very low input voltage noise and  
input current noise. The thermal noise of a 1 kΩ resistor at  
room temperature is 4 nV/√Hz; therefore, low values of  
resistance should be used for dc-coupled inverting and  
noninverting amplifier configurations. In the case of  
transimpedance amplifiers (TIAs), current noise is more  
important.  
100kΩ  
7
2
1
5
6
ADA4627-1  
3
4
The ADA4627-1/ADA4637-1 are an excellent choice for both of  
these applications. Analog Devices offers a wide variety of low  
voltage noise and low current noise op amps in a variety of  
processes that are optimized for different supply voltage ranges.  
Refer to Application Note AN-940 for a discussion of noise,  
calculations, and selection tables for more than three dozen low  
noise, op amp families.  
–V  
S
Figure 47. Standard Offset Null Circuit  
With a 100 kΩ potentiometer, the adjustment range is  
more than 11 mV. However, the VOS temperature drift  
increases by several µV/°C for every millivolt of offset adjust.  
The ADA4627-1/ADA4637-1 have matching thin film resistors  
that are laser trimmed at two temperatures to minimize both  
offset voltage and offset voltage drift. The offset voltage at room  
temperature is less than 0.5 mV, and the offset voltage drift is  
only a few µV/°C or less; therefore, it is not recommended to  
Rev. E | Page 14 of 20  
 
 
 
 
 
 
 
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