AD9856
REGISTER BIT DEFINITIONS
Control Bits—Register Address 00h and 01h
SDO Active—Register
Address 00h, Bit 7. Active high indicates
serial port uses dedicated in/out lines. Default low configures
serial port as single line I/O.
LSB First—Register
Address 00h, Bit 6. Active high indicates
serial port access is LSB to MSB format. Default low indicates
MSB to LSB format.
REFCLK Multiplier—Register
Address 00h, Bits 5, 4, 3, 2, 1 form
the reference clock multiplier. Valid entries range from
4–20 (decimal). Straight binary to decimal conversion is imple-
mented. For example, to multiply the reference clock by 19 deci-
mal, Program Register Address 00h, Bits 5–1, as 13h. Default value
is 0A (hex).
INPUT FORMAT SELECT—Register
Address 01h, Bits 1
and 0, form the Input Format Mode bits.
10b = 12-bit mode
01b = 6-bit mode
00b = 3-bit mode
Default value is 10b (12-bit mode).
Profile 1 Registers—Active when PROFILE Inputs Are 00b
FREQUENCY TUNING WORD (FTW)—The
frequency
tuning word for Profile 1 is formed via a concatenation of regis-
ter addresses 05h, 04h, 03h and 02h. Bit 7 of register address
05h is the most significant bit of the Profile 1 frequency tuning
word. Bit 0 of register address 02h is the least significant bit of
the Profile 1 frequency tuning word. The output frequency
equation is given as: f
OUT
= (FTW
×
SYSCLK)/2
32
.
INTERPOLATION RATE—Register
Address 06h, Bits 7
through 2 form the Profile 1 CIC filter interpolation rate value.
Allowed values range from 2 to 63 (decimal).
SPECTRAL INVERSION—Register
Address 06h, Bit 1. Ac-
tive high, Profile 1 Spectral Inversion bit. When active, inverted
modulation is performed [I
×
Cos(ωt) + Q
×
Sin(ωt)]. Default is
inactive, logic zero, noninverted modulation [I
×
Cos(ωt) – Q
×
Sin(ωt)].
BYPASS HALF-BAND FILTER 3—Register
Address 06h, Bit
0. Active high, causes the AD9856 to bypass the third half-band
filter stage that precedes the CIC interpolation filter. Bypassing
the third half-band filter negates the 2× upsample inherent with
this filter and reduces the overall interpolation rate of the half-
band filter chain from 8× to 4×. Default value is 0 (half-band 3
enabled).
AD8320/AD8321 GAIN CONTROL—Register
Address 07h,
Bits 7 through 0 form the Profile 1 AD8320/AD8321 gain bits.
The AD9856 dedicates three output pins, which directly in-
terface to the AD8320/AD8321 cable driver amp. This allows
direct control of the cable driver via the AD9856. See the
Programming/Writing the AD8320/AD8321 Cable Driver Gain
Control section of this data sheet for more details. Bit 7 is the
MSB, Bit 0 is the LSB. Default value is 00h.
Profile 2 Registers—Active when PROFILE Inputs Are 01b
RESERVED BIT—Register
Address 00h, Bit 0. This bit is
reserved. Always set this bit to Logic 1 when writing to this
register.
CIC GAIN—Register
Address 01h, Bit 7. The CIC GAIN bit
multiplies the CIC filter output by 2. See the Cascaded Inte-
grated Comb Filter section of this data sheet for more details.
Default value is 0 (inactive).
CONTINUOUS MODE—Register
Address 01h, Bit 6 is the
continuous mode configuration bit. Active high, configures the
AD9856 to accept continuous mode timing on the TxENABLE
input. A low configures the device for burst mode timing. De-
fault value is 0 (burst mode).
FULL SLEEP MODE—Register
Address 01h, Bit 5. Active
high full sleep mode bit. When activated, the AD9856 enters a
full shutdown mode, consuming less than 2 mA, after completing
a shutdown sequence. Default value is 0 (awake).
SINGLE TONE MODE—Register
Address 01h, Bit 4. Active
high configures the AD9856 for single tone applications. The
AD9856 will supply a single frequency output as determined by
the frequency tuning word (FTW) selected by the active profile.
In this mode, the 12 input data pins are ignored but should be
tied high or low. Default value is 0 (inactive).
BYPASS INVERSE SINC FILTER—Register
Address 01h,
Bit 3. Active high, configures the AD9856 to bypass the SIN(x)/
x compensation filter. Defaults value is 0 (Inverse SINC Filter
Enabled).
BYPASS REFCLK Multiplier—Register
Address 01h, Bit 2.
Active high, configures the AD9856 to bypass the REFCLK
Multiplier function. When active, effectively causes the REFCLK
Multiplier factor to be 1. Defaults value is 1 (REFCLK Multi-
plier bypassed).
Profile 2 Register functionality is identical to Profile 1, with the
exception of the register addresses.
Profile 3 Registers—Active when PROFILE Inputs Are 10b
Profile 3 Register functionality is identical to Profile 1, with the
exception of the register addresses.
Profile 4 Registers—Active when PROFILE Inputs Are 11b
Profile 4 Register functionality is identical to Profile 1, with the
exception of the register addresses.
–12–
REV. B
AD [ ANALOG DEVICES ]
