AD9803–SPECIFICATIONS
AUX-MODE SPECIFICATIONS
Parameter
POWER CONSUMPTION
Normal (D-Reg 00)
High Speed (D-Reg 01)
MAXIMUM CLOCK RATE
PGA
Max Input Range
Max Output Range
Digital Gain Control
Gain Control Resolution
Gain (Selected by the Serial I/F)
Gain(0)
Gain(255)
ACTIVE CLAMP (CLAMP ON)
Clamp Level (Selectable by the Serial I/F)
CLP(0) (E-Reg 00)
CLP(1) (E-Reg 01)
CLP(2) (E-Reg 10)
CLP(3) (E-Reg 11)
TIMING SPECIFICATIONS
1
Pipeline Delay
Internal Clock Delay (t
ID
)
Output Delay (t
OD
)
Output Hold Time (t
HOLD
)
NOTES
1
20 pF loading; timing shown in Figure 2.
Specifications subject to change without notice.
(T
MIN
to T
MAX
, ACVDD = ADVDD = DVDD = +2.8 V, f
ADCCLK
= 18 MHz unless otherwise noted)
Min
Typ
80
110
18
700
1000
8 (Fixed)
–3.5
10.5
Max
Units
mW
mW
MHz
mV p-p
mV p-p
Bits
dB
dB
34
50
66
18
4 (Fixed)
5
20
2
LSB
LSB
LSB
LSB
Cycles
ns
ns
ns
ADC-MODE SPECIFICATIONS
(T
Parameter
MAXIMUM CLOCK RATE
ACTIVE CLAMP (Same as AUX-MODE)
MIN
to T
MAX
, ACVDD = ADVDD = DVDD = +2.8 V, f
ADCCLK
= 18 MHz unless otherwise noted)
Min
Typ
65
18
Max
Units
mW
MHz
POWER CONSUMPTION (Normal D-Reg 00)
TIMING SPECIFICATIONS (Same as AUX-MODE)
Specifications subject to change without notice.
DAC SPECIFICATIONS (DAC1 and DAC2)
Parameter
RESOLUTION
MIN OUTPUT
MAX OUTPUT
MAX CURRENT LOAD
MAX CAPACITIVE LOAD
Specifications subject to change without notice.
Min
Typ
8 (Fixed)
0.1
VDD – 0.1
1
500
Max
Units
Bits
V
V
mA
pF
–4–
REV. 0