AD9764
+5V
0.1 F
REFLO
+1.20V REF
V
REFIO
0.1 F
R
SET
2k
I
REF
+5V
REFIO
FS ADJ
DVDD
DCOM
CLOCK
CLOCK
SLEEP
50pF
COMP1
AVDD
ACOM
AD9764
PMOS
CURRENT SOURCE
ARRAY
COMP2
0.1 F
V
DIFF
= V
OUTA
– V
OUTB
I
OUTA
I
OUTA
I
OUTB
V
OUTB
R
LOAD
50
V
OUTA
R
LOAD
50
SEGMENTED SWITCHES
FOR DB13–DB5
LATCHES
LSB
SWITCHES
I
OUTB
DIGITAL DATA INPUTS (DB13–DB0)
Figure 21. Functional Block Diagram
FUNCTIONAL DESCRIPTION
I
OUTB
= (16383 –
DAC CODE)/16384
×
I
OUTFS
(2)
Figure 21 shows a simplified block diagram of the AD9764. The
AD9764 consists of a large PMOS current source array that is
capable of providing up to 20 mA of total current. The array
is divided into 31 equal currents that make up the five most
significant bits (MSBs). The next four bits or middle bits consist
of 15 equal current sources whose value is 1/16th of an MSB
current source. The remaining LSBs are binary weighted frac-
tions of the middle bits current sources. Implementing the
middle and lower bits with current sources, instead of an R-2R
ladder, enhances its dynamic performance for multitone or low
amplitude signals and helps maintain the DAC’s high output
impedance (i.e., >100 kΩ).
All of these current sources are switched to one or the other of
the two output nodes (i.e., I
OUTA
or I
OUTB
) via PMOS differen-
tial current switches. The switches are based on a new architec-
ture that drastically improves distortion performance. This new
switch architecture reduces various timing errors and provides
matching complementary drive signals to the inputs of the dif-
ferential current switches.
The analog and digital sections of the AD9764 have separate
power supply inputs (i.e., AVDD and DVDD) that can operate
independently over a 2.7 volt to 5.5 volt range. The digital
section, which is capable of operating up to a 125 MSPS clock
rate, consists of edge-triggered latches and segment decoding
logic circuitry. The analog section includes the PMOS current
sources, the associated differential switches, a 1.20 V bandgap
voltage reference and a reference control amplifier.
The full-scale output current is regulated by the reference con-
trol amplifier and can be set from 2 mA to 20 mA via an exter-
nal resistor, R
SET
. The external resistor, in combination with
both the reference control amplifier and voltage reference
V
REFIO
, sets the reference current I
REF
, which is mirrored over to
the segmented current sources with the proper scaling factor.
The full-scale current, I
OUTFS
, is 32 times the value of I
REF
.
DAC TRANSFER FUNCTION
where
DAC CODE
= 0 to 16383 (i.e., Decimal Representation).
As mentioned previously, I
OUTFS
is a function of the reference
current I
REF
, which is nominally set by a reference voltage
V
REFIO
and external resistor R
SET
. It can be expressed as:
I
OUTFS
= 32
×
I
REF
where
I
REF
=
V
REFIO
/R
SET
(3)
(4)
The two current outputs will typically drive a resistive load
directly or via a transformer. If dc coupling is required, I
OUTA
and I
OUTB
should be directly connected to matching resistive
loads, R
LOAD
, that are tied to analog common, ACOM. Note
that R
LOAD
may represent the equivalent load resistance seen by
I
OUTA
or I
OUTB
as would be the case in a doubly terminated
50
Ω
or 75
Ω
cable. The single-ended voltage output appearing
at the I
OUTA
and I
OUTB
nodes is simply:
V
OUTA
=
I
OUTA
×
R
LOAD
V
OUTB
=
I
OUTB
×
R
LOAD
(5)
(6)
Note that the full-scale value of V
OUTA
and V
OUTB
should not
exceed the specified output compliance range to maintain speci-
fied distortion and linearity performance.
The differential voltage, V
DIFF
, appearing across I
OUTA
and
I
OUTB
is:
V
DIFF
= (I
OUTA
– I
OUTB
)
×
R
LOAD
(7)
Substituting the values of I
OUTA
, I
OUTB
and I
REF
; V
DIFF
can be
expressed as:
V
DIFF
= {(2
DAC CODE
– 16383)/16384}
×
V
DIFF
= {(32
R
LOAD
/R
SET
)
×
V
REFIO
(8)
The AD9764 provides complementary current outputs, I
OUTA
and I
OUTB
. I
OUTA
will provide a near full-scale current output,
I
OUTFS
, when all bits are high (i.e., DAC CODE = 16383) while
I
OUTB
, the complementary output, provides no current. The
current output appearing at I
OUTA
and I
OUTB
is a function of
both the input code and I
OUTFS
and can be expressed as:
I
OUTA
= (DAC
CODE/16384)
×
I
OUTFS
REV. B
(1)
–9–
These last two equations highlight some of the advantages of
operating the AD9764 differentially. First, the differential op-
eration will help cancel common-mode error sources associated
with I
OUTA
and I
OUTB
such as noise, distortion and dc offsets.
Second, the differential code-dependent current and subsequent
voltage, V
DIFF
, is twice the value of the single-ended voltage
output (i.e., V
OUTA
or V
OUTB
), thus providing twice the signal
power to the load.
Note that the gain drift temperature performance for a single-
ended (V
OUTA
and V
OUTB
) or differential output (V
DIFF
) of the
AD9764 can be enhanced by selecting temperature tracking
resistors for R
LOAD
and R
SET
due to their ratiometric relation-
ship as shown in Equation 8.
AD [ ANALOG DEVICES ]
