(AVDD = +3 V, DRVDD = +3 V, FS = 32 MHz (50% Duty Cycle), MODE = AVDD, 2 V Input
AD9280–SPECIFICATIONS Span from 0.5 V to 2.5 V, External Reference, TMIN to TMAX unless otherwise noted)
Parameter
Symbol
Min
Typ
Max
Units
Bits
Condition
RESOLUTION
CONVERSION RATE
8
FS
32
MHz
DC ACCURACY
Differential Nonlinearity
Integral Nonlinearity
Offset Error
DNL
INL
EZS
±0.2
±0.3
±0.2
±1.2
±1.0
±1.5
±1.8
±3.9
LSB
LSB
% FSR
% FSR
REFTS = 2.5 V, REFBS = 0.5 V
Gain Error
EFS
REFERENCE VOLTAGES
Top Reference Voltage
Bottom Reference Voltage
Differential Reference Voltage
Reference Input Resistance1
REFTS
REFBS
1
AVDD
AVDD – 1 V
V p-p
V
GND
2
10
4.2
kΩ
kΩ
REFTS, REFBS: MODE = AVDD
Between REFTF & REFBF: MODE = AVSS
ANALOG INPUT
Input Voltage Range
Input Capacitance
AIN
CIN
tAP
tAJ
BW
REFBS
REFTS
V
REFBS Min = GND: REFTS Max = AVDD
Switched
1
4
2
pF
ns
ps
Aperture Delay
Aperture Uncertainty (Jitter)
Input Bandwidth (–3 dB)
Full Power (0 dB)
300
43
MHz
µA
DC Leakage Current
Input = ±FS
INTERNAL REFERENCE
Output Voltage (1 V Mode)
Output Voltage Tolerance (1 V Mode)
Output Voltage (2 V Mode)
Load Regulation (1 V Mode)
VREF
VREF
1
±10
2
V
mV
V
REFSENSE = VREF
±25
REFSENSE = GND
1 mA Load Current
0.5
2
mV
POWER SUPPLY
Operating Voltage
AVDD
DRVDD
IAVDD
PD
2.7
2.7
3
3
31.7
95
4
5.5
5.5
36.7
110
V
V
mA
mW
mW
Supply Current
Power Consumption
Power-Down
AVDD = 3 V, MODE = AVSS
AVDD = DRVDD = 3 V, MODE = AVSS
STBY = AVDD, MODE and CLOCK
= AVSS
Gain Error Power Supply Rejection
PSRR
1
% FS
DYNAMIC PERFORMANCE (AIN = 0.5 dBFS)
Signal-to-Noise and Distortion
f = 3.58 MHz
f = 16 MHz
Effective Bits
f = 3.58 MHz
f = 16 MHz
Signal-to-Noise
f = 3.58 MHz
SINAD
46.4
47.8
49
48
dB
dB
7.8
7.7
Bits
Bits
SNR
49
48
dB
dB
f = 16 MHz
Total Harmonic Distortion
f = 3.58 MHz
f = 16 MHz
Spurious Free Dynamic Range
f = 3.58 MHz
f = 16 MHz
THD
SFDR
–62
–58
–49.5
51.4
dB
dB
66
61
dB
dB
Differential Phase
Differential Gain
DP
DG
0.2
0.08
Degree NTSC 40 IRE Mod Ramp
%
REV. D
–2–
ADI [ ADI ]
