AD9280
0
APPLYING THE AD9280
THEORY OF OPERATION
–3
The AD9280 implements a pipelined multistage architecture to
achieve high sample rate with low power. The AD9280 distrib-
utes the conversion over several smaller A/D subblocks, refining
the conversion with progressively higher accuracy as it passes
the results from stage to stage. As a consequence of the distrib-
uted conversion, the AD9280 requires a small fraction of the
256 comparators used in a traditional flash type A/D. A sample-
and-hold function within each of the stages permits the first
stage to operate on a new input sample while the second, third
and fourth stages operate on the three preceding samples.
–6
–9
–12
–15
–18
–21
–24
1.0E+6
1.0E+7
1.0E+8
1.0E+9
OPERATIONAL MODES
FREQUENCY – Hz
The AD9280 is designed to allow optimal performance in a
wide variety of imaging, communications and instrumentation
applications, including pin compatibility with the AD876-8 A/D.
To realize this flexibility, internal switches on the AD9280 are
used to reconfigure the circuit into different modes. These modes
are selected by appropriate pin strapping. There are three parts
of the circuit affected by this modality: the voltage reference, the
reference buffer, and the analog input. The nature of the appli-
cation will determine which mode is appropriate: the descrip-
tions in the following sections, as well as Table I should assist in
selecting the desired mode.
Figure 13. Full Power Bandwidth
50
40
30
20
REFBS = 0.5V
REFTS = 2.5V
CLOCK = 32MHz
10
0
–10
–20
–30
–40
–50
0
0.5
1.0
1.5
2.0
2.5
3.0
INPUT VOLTAGE – V
Figure 14. Input Bias Current vs. Input Voltage
Table I. Mode Selection
Input
Connect
Input
Span
MODE
Pin
REFSENSE
Pin
Modes
REF
REFTS
REFBS Figure
TOP/BOTTOM AIN
AIN
1 V
2 V
AVDD
AVDD
Short REFSENSE, REFTS and VREF Together
AGND Short REFTS and VREF Together
AGND
AGND
18
19
CENTER SPAN AIN
AIN
1 V
2 V
AVDD/2 Short VREF and REFSENSE Together
AVDD/2 AGND No Connect
AVDD/2 Short VREF and REFSENSE Together
AVDD/2
AVDD/2
AVDD/2 20
AVDD/2
Differential
AIN Is Input 1
1 V
AVDD/2
AVDD/2 29
REFTS and
REFBS Are
Shorted Together
for Input 2
2 V
AVDD/2 AGND
No Connect
No Connect
AVDD/2
AVDD/2
External Ref
AD876-8
AIN
2 V max AVDD
AVDD
Span = REFTS
21, 22
– REFBS (2 V max)
AGND
Short to
VREFTF
Short to 23
VREFBF
AIN
2 V
Float or AVDD
AVSS
No Connect
Short to
VREFTF
Short to 30
VREFBF
REV. D
–8–
ADI [ ADI ]
