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AD9223AR 参数 Datasheet PDF下载

AD9223AR图片预览
型号: AD9223AR
PDF下载: 下载PDF文件 查看货源
内容描述: 完整的12位1.5 / 3.0 / 10.0 MSPS单片A / D转换器 [Complete 12-Bit 1.5/3.0/10.0 MSPS Monolithic A/D Converters]
分类和应用: 转换器
文件页数/大小: 28 页 / 353 K
品牌: ADI [ ADI ]
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AD9221/AD9223/AD9220  
SFDR over a wide range of amplitudes required by the most  
demanding communication applications. Similar performance is  
achievable with the AD9221 and AD9223 at their correspond-  
ing Nyquist frequency.  
pin configures the internal reference amplifier for a gain of 2.5  
and the resultant VREF output is 2.5 V. Thus, the valid input  
range becomes 0 V to 5 V. The VREF pin should be bypassed  
to the REFCOM pin with a 10 µF tantalum capacitor in parallel  
with a low-inductance 0.1 µF ceramic capacitor.  
90  
2
؋
VREF  
AD9221/  
VINA  
SFDR – 5.0V p-p  
80  
AD9223/  
AD9220  
0V  
SFDR – 2.0V p-p  
70  
VINB  
10F  
0.1F  
VREF  
60  
50  
SHORT FOR 0V TO 2V  
INPUT SPAN  
SENSE  
SNR – 2.0V p-p  
SHORT FOR 0V TO 5V  
INPUT SPAN  
40  
SNR – 5.0V p-p  
REFCOM  
30  
20  
Figure 47. Internal Reference—2 V p-p Input Span, VCM  
1 V, or 5 V p-p Input Span, VCM = 2.5 V  
=
–50  
–40  
–30  
–20  
–10  
0
INPUT AMPLITUDE – dBFS  
Single-Ended or Differential Input, VCM = 2.5 V  
Figure 46. AD9220 SFDR, SNR vs. Input Amplitude  
(fIN = 5 MHz, fCLK = 10 MSPS, VCM = 2.5 V, Differential)  
Figure 48 shows the single-ended configuration that gives the  
best dynamic performance (SINAD, SFDR). To optimize  
dynamic specifications, center the common-mode voltage of the  
analog input at approximately by 2.5 V by connecting VINB to  
a low-impedance 2.5 V source. As described above, shorting  
the VREF pin directly to the SENSE pin results in a 1 V refer-  
ence voltage and a 2 V p-p input span. The valid range for  
input signals is 1.5 V to 3.5 V. The VREF pin should be by-  
passed to the REFCOM pin with a 10 µF tantalum capacitor in  
parallel with a low-inductance 0.1 µF ceramic capacitor.  
Figure 46 also reveals a noteworthy difference in the SFDR and  
SNR performance of the AD9220 between the 2 V p-p and 5 V  
p-p input span options. First, the SNR performance improves  
by 2 dB with a 5.0 V p-p input span due to the increase in dy-  
namic range. Second, the SFDR performance of the AD9220  
will improve for input signals below approximately –6.0 dBFS.  
A 3 dB to 5 dB improvement was typically realized for input  
signal levels between –6.0 dBFS and –36 dBFS. This improve-  
ment in SNR and SFDR for a 5.0 V p-p span may be advanta-  
geous for communication systems that have additional margin  
or headroom to minimize clipping of the ADC.  
This reference configuration could also be used for a differential  
input in which VINA and VINB are driven via a transformer as  
shown in Figure 45. In this case, the common-mode voltage,  
VCM, is set at midsupply by connecting the transformers center  
tap to CML of the AD9221/AD9223/AD9220. VREF can be  
configured for 1 V or 2.5 V by connecting SENSE to either  
VREF or REFCOM respectively. Note that the valid input  
range for each of the differential input is one half of the single-  
ended input and thus becomes VCM – VREF/2 to VCM + VREF/2.  
REFERENCE CONFIGURATIONS  
The figures associated with this section on internal and external  
reference operation do not show recommended matching series resistors  
for VINA and VINB for the purpose of simplicity. Please refer to  
section Driving the Analog Inputs, Introduction for a discussion of  
this topic. Also, the figures do not show the decoupling network asso-  
ciated with the CAPT and CAPB pins. Please refer to the section “Ref-  
erence Operation” for a discussion of the internal reference circuitry  
and the recommended decoupling network shown in Figure 36.  
3.5V  
VINA  
VINB  
AD9221/  
AD9223/  
AD9220  
1.5V  
2.5V  
USING THE INTERNAL REFERENCE  
1V  
VREF  
Single-Ended Input with 0 to 2 
؋
 VREF Range  
SENSE  
0.1F  
10F  
Figure 47 shows how to connect the AD9221/AD9223/AD9220  
for a 0 V to 2 V or 0 V to 5 V input range via pin strapping the  
SENSE pin. An intermediate input range of 0 to 2 × VREF can  
be established using the resistor programmable configuration in  
Figure 49 and connecting VREF to VINB.  
REFCOM  
Figure 48. Internal Reference—2 V p-p Input Span,  
CM = 2.5 V  
V
In either case, both the common-mode voltage and input span  
are directly dependent on the value of VREF. More specifically,  
the common-mode voltage is equal to VREF while the input  
span is equal to 2 × VREF. Thus, the valid input range extends  
from 0 to 2 × VREF. When VINA is 0 V, the digital output  
will be 000 Hex; when VINA is 2 × VREF, the digital output  
will be FFF Hex.  
Resistor Programmable Reference  
Figure 49 shows an example of how to generate a reference  
voltage other than 1 V or 2.5 V with the addition of two exter-  
nal resistors and a bypass capacitor. Use the equation,  
VREF = 1 V × (1 + R1/R2),  
to determine appropriate values for R1 and R2. These resistors  
should be in the 2 kto 100 krange. For the example shown,  
R1 equals 2.5 kand R2 equals 5 k. From the equation  
above, the resultant reference voltage on the VREF pin is  
Shorting the VREF pin directly to the SENSE pin places the  
internal reference amplifier in unity-gain mode and the resultant  
VREF output is 1 V. Therefore, the valid input range is 0 V to  
2 V. However, shorting the SENSE pin directly to the REFCOM  
–18–  
REV. D  
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