AD9200
PIN CONFIGURATIONS
28-Lead Shrink Small Outline (SSOP)
AVSS 1
DRVDD 2
D0 3
D1 4
D2 5
D3 6
28 AVDD
27 AIN
26 VREF
25 REFBS
D0
1
D1
2
D2
3
D3
4
D4
5
NC
6
NC
7
D5
8
D6
9
D7
10
D8
11
D9
12
NC = NO CONNECT
13 14 15 16 17 18 19 20 21 22 23 24
PIN 1
IDENTIFIER
36
35
34
33
32
48-Lead Plastic Thin Quad Flatpack (LQFP)
NC
DRVDD
AVSS
AVDD
VREF
AIN
NC
NC
NC
NC
48 47 46 45 44 43 42 41 40 39 38 37
NC
NC
NC
REFBS
REFBF
NC
MODE
NC
REFTF
REFTS
CLAMPIN
CLAMP
REFSENSE
NC
AD9200
24 REFBF
TOP VIEW 23 MODE
D4 7 (Not to Scale) 22 REFTF
D5 8
D6 9
D7 10
D8 11
D9 12
OTR 13
DRVSS 14
21 REFTS
20 CLAMPIN
19 CLAMP
18 REFSENSE
17 STBY
16 THREE-STATE
15 CLK
AD9200
TOP VIEW
(Not to Scale)
31
30
29
28
27
26
25
NC
NC
THREE-STATE
OTR
NC
NC
NC
DRVSS
CLK
NC
NC
PIN FUNCTION DESCRIPTIONS
SSOP
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
LQFP
Pin No.
44
45
1
2
3
4
5
8
9
10
11
12
16
17
22
23
24
26
27
28
29
30
32
34
35
38
39
42
Name
AVSS
DRVDD
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
OTR
DRVSS
CLK
THREE-STATE
STBY
REFSENSE
CLAMP
CLAMPIN
REFTS
REFTF
MODE
REFBF
REFBS
VREF
AIN
AVDD
Description
Analog Ground
Digital Driver Supply
Bit 0, Least Significant Bit
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9, Most Significant Bit
Out-of-Range Indicator
Digital Ground
Clock Input
HI: High Impedance State. LO: Normal Operation
HI: Power-Down Mode. LO: Normal Operation
Reference Select
HI: Enable Clamp Mode. LO: No Clamp
Clamp Reference Input
Top Reference
Top Reference Decoupling
Mode Select
Bottom Reference Decoupling
Bottom Reference
Internal Reference Output
Analog Input
Analog Supply
REV. E
–5–
STBY
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