AD8842
PIN DESCRIPTION
PIN CONFIGURATION
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Mnemonic
V
OUT
C
V
OUT
B
V
OUT
A
V
IN
B
V
IN
A
GND
PR
V
IN
E
V
IN
F
V
OUT
E
V
OUT
F
V
OUT
G
V
OUT
H
V
IN
G
V
IN
H
LD
Description
DAC C Output
DAC B Output
DAC A Output
DAC B Reference Input
DAC A Reference Input
Ground
Preset Input, active low, all DAC
registers = 80
H
DAC E Reference Input
DAC F Reference Input
DAC E Output
DAC F Output
DAC G Output
DAC H Output
DAC G Reference Input
DAC H Reference Input
Load DAC Register Strobe, active-
high input that transfers the data
bits from the serial-input register
into the decoded DAC register.
SDI and CLK inputs are disabled
when LD is high. See Tables I and II
Serial Clock Input, positive edge
triggered
Serial Data Output, active totem
pole output
Negative 5 V Power Supply
Serial Data Input
Positive 5 V Power Supply
DAC D Reference Input
DAC C Reference Input
DAC D Output
V
OUT
C
V
OUT
B
V
OUT
A
V
IN
B
V
IN
A
GND
PR
V
IN
E
V
IN
F
1
2
3
4
5
6
7
8
9
24 V
OUT
D
23 V
IN
C
22 V
IN
D
21 V
DD
20 SDI
19 V
SS
TOP VIEW
18 SDO
(Not to Scale)
17 CLK
16
15
14
13
LD
V
IN
H
V
IN
G
V
IN
H
AD8842
V
OUT
E 10
V
OUT
F 11
V
OUT
G 12
17
18
19
20
21
22
23
24
CLK
SDO
V
SS
SDI
V
DD
V
IN
D
V
IN
C
V
OUT
D
–4–
REV. 0
AD [ ANALOG DEVICES ]
