AD8362
AD8362 EVALUATION BOARD
with SW1 switched to its alternate position, LK1 removed, and
the external target voltage applied to the VTGT connector.
The AD8362 evaluation board provides for a number of dif-
ferent operating modes and configurations, including many
described in this data sheet. The measurement mode is set up
by positioning SW2 as shown in Figure 67. The AD8362 can be
operated in controller mode by applying the setpoint voltage to
the VSET connector, and flipping SW2 to its alternate position.
In measurement mode, the slope of the response at VOUT may
be increased by using a voltage divider implemented with resis-
tors in Position R17 and Position R9, and with SW2 switched to
its alternate position.
The internal voltage reference is used for the target voltage when
SW1 is in the position shown in Figure 67. This voltage may
optionally be reduced via a voltage divider implemented with
R4 and R5, with LK1 in place, and SW1 switched to its alternate
position. Alternatively, an external target voltage may be used
The AD8362 is powered up with SW3 in the position shown in
Figure 67 and connector PWDN open. The part can be powered
down by either connecting a logic high voltage to a connector,
PWDN, with SW3 in the position, or by switching SW3 to its
alternate position.
R1
0Ω
AGND
VPOS
C1
0.1µF
C2
100pF
R14
OPEN
R15
0Ω
AD8362
1
2
3
4
5
6
7
8
COMM
ACOM 16
R4
C8
0Ω
1000pF
15
VREF
VREF
VTGT 14
VPOS
CHPF
DECL
INHI
C7
1000pF
R5
C10
1000pF
C6
100pF
10kΩ
LK1
SW1
T1
R6
RFIN
0Ω
13
VTGT
VOUT
R16
OPEN
INLO
VOUT 12
VSET 11
R17
R8
R7
0Ω
C5
100pF
OPEN 0Ω
DECL
PWDN
COMM
SW2
R9
10kΩ
C4
1000pF
ACOM
CLPF
10
9
C3
VSET
0.1µF
SW3
PWDN
R10
0Ω
R13
10kΩ
C9
OPEN
Figure 67. Evaluation Board Schematic
Rev. D | Page 28 of 32
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