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AD8362-EVAL 参数 Datasheet PDF下载

AD8362-EVAL图片预览
型号: AD8362-EVAL
PDF下载: 下载PDF文件 查看货源
内容描述: 50 Hz至2.7 GHz的60分贝TruPwr⑩探测器 [50 Hz to 2.7 GHz 60 dB TruPwr⑩ Detector]
分类和应用:
文件页数/大小: 36 页 / 699 K
品牌: ADI [ ADI ]
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AD8362  
Table 5. Suggested Values for Use in Scheme of Figure 63  
4
3
2
1
R1 (Ω)  
R2 (Ω)  
VSLP' (V/decade)  
VZ' (mV)  
0.334  
0.336  
0.333  
0.340  
0.355  
0.380  
KC (m)  
11.3  
10.4  
6.5  
O/C  
S/C  
0.868  
1904  
1346  
872  
480  
200  
96  
654  
1128  
1520  
1800  
0.870  
0.890  
0.914  
0.942  
0
3.7  
1.5  
0.5  
30  
20  
10  
0.972  
0
HIGH SLOPE DETECTORS CENTERED ON A  
NARROW WINDOW  
–10  
–20  
–30  
The situation often arises in system monitoring in which an  
input signal varies by much less than 60 dB, and the highest  
possible sensitivity and accuracy of measurement is required  
within a narrow window of input magnitudes. Adapting the  
AD8362 to this task requires that the slope be increased and the  
intercept repositioned. Using an attenuator from VOUT to  
VSET, any slope >50 mV/dB can be realized. Then, using a  
fraction of VREF (or external reference voltage), the particular  
region of the dynamic range to be measured can be positioned  
wherever desired. In these high slope applications, the full rail-  
to-rail output swing of the AD8362 can be exploited.  
100µ  
1m  
10m  
0.1  
1
10  
RMS INPUT VOLTAGE (V)  
Figure 66. Illustrative Results for Slope of 100 mV/dB  
4
3
2
1
0
30  
SLOPE  
R1  
R2  
AD8362  
(V/dec)  
2
4
5
(k)  
4.02  
8.66  
8.66  
9.1  
(k)  
4.32  
3.01  
2.15  
1.02  
20  
10  
1
2
3
4
5
16  
15  
14  
13  
12  
11  
10  
9
COMM ACOM  
CHPF  
DECL  
INHI  
VREF  
VTGT  
VPOS  
VOUT  
VSET  
0
10  
–10  
–20  
–30  
V
INLO  
DECL  
OUT  
R1  
R2  
100µ  
1m  
10m  
0.1  
1
10  
6
7
8
RMS INPUT VOLTAGE (V)  
PWDN ACOM  
COMM CLPF  
INTERCEPT OFFSET  
VOLTAGE, V  
Figure 67. Illustrative Results for Slope of 200 mV/dB  
SHIFT  
Figure 65. Slope and Intercept Adjustment  
4
3
2
1
Figure 65 shows the basic connections for this mode of use; the  
intercept repositioning voltage VSHIFT can be introduced by  
adding a third resistor from VREF to VSET with recalculated  
values of R1 and R2 or by using an external voltage source.  
Figure 66 presents the simulation results for a log slope of  
100 mV/dB (2 V/dec) covering two-decade spans over several  
sub-ranges, while Figure 67 shows the results for a slope of  
200 mV/dB (4 V/dec), providing just a one-decade span.  
0
30  
20  
10  
0
To accurately reposition the range (intercept) when very high  
slopes are used, a low output impedance DAC can be used to  
provide VSHIFT. Figure 68 shows simulated results for a slope of  
500 mV/dB (10 V/dec) presuming this configuration. In all  
cases, the fixed-pattern ripple in the log conformance remains  
unchanged in dB terms. Residual fluctuations due to insufficient  
averaging (in low frequency applications) are likewise  
unaffected in their equivalent decibel value, though greater in  
absolute voltage terms.  
–10  
–20  
–30  
100µ  
1m  
10m  
0.1  
1
10  
RMS INPUT VOLTAGE (V)  
Figure 68. Illustrative Results for Slope of 10 mV/dec  
Rev. B | Page 31 of 36  
 
 
 
 
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