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AD8362-EVAL 参数 Datasheet PDF下载

AD8362-EVAL图片预览
型号: AD8362-EVAL
PDF下载: 下载PDF文件 查看货源
内容描述: 50 Hz至2.7 GHz的60分贝TruPwr⑩探测器 [50 Hz to 2.7 GHz 60 dB TruPwr⑩ Detector]
分类和应用:
文件页数/大小: 36 页 / 699 K
品牌: ADI [ ADI ]
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AD8362  
OPERATOR IN CONTROLLER MODES  
In order to fully understand this section, it is important to first  
read the preceding discussion of measurement modes, because  
there are only a few differences in operation and connections.  
When used in controller applications, the basic objective is to  
use the AD8362 as a level-sensing element in such a way that its  
output, here VAPC, moves in a direction that increases the  
controlled signal when the input sample is too low, and vice  
versa. A general scheme is shown in Figure 60.  
Every value of VSET maps uniquely to a specific rms value at its  
input. Thus, the major loop shown in Figure 60 forces the  
system being controlled to deliver exactly this level (which may  
be either in voltage form or as a sample of the power output).  
This mode of operation is therefore just an extension of the  
measurement mode, having exactly the same scaling (slope and  
intercept) at the VSET pin.  
When the system in Figure 60 is an RF power amplifier (PA), a  
practical consideration immediately comes to our attention.  
Frequently, the gain (and thus output power) is arranged to  
increase in response to an increasing positive voltage applied to  
the gain control pin. However, the AD8362’s output tends  
toward higher values as its input crosses over the level  
corresponding to the setpoint, which would cause the PA’s  
output to increase further. In other words, the feedback polarity  
is reversed, forcing the control loop to latch up at one of its  
power extremes.  
CONTROLLED SYSTEM  
(OUTPUT POWER  
DECREASES AS V  
APC  
INCREASES)  
SYSTEM  
OUTPUT  
SYSTEM  
INPUT  
OUTPUT  
INPUT  
V
APC  
R
= 100  
SH  
V
S
FOR 50Ω  
TERMINATION  
AD8362  
COMM ACOM 16  
3.3Ω  
1
2
3
4
An increasing number of modular PAs feature a control polarity  
that reduces the power output with increases in control voltage.  
These can be controlled directly from the VOUT pin of the  
AD8362. Elsewhere, it is necessary to provide the sign inversion  
using a low noise buffer. This amplifier may also include  
provisions to ensure that the PA is never driven beyond its safe  
limits. The complete details of such a control system depends  
on many factors, and this example shows only generic aspects of  
the design.  
NC  
CHPF  
DECL  
INHI  
VREF 15  
VTGT 14  
0.1µF  
1nF  
1nF  
VPOS  
13  
R
1nF  
SH  
5
6
7
8
INLO  
VOUT 12  
VSET 11  
1nF  
1nF  
SETPOINT  
VOLTAGE INPUT  
0.5V TO 3.5V  
DECL  
PWDN ACOM 10  
COMM CLPF  
9
C
LPF  
Figure 60. Generalized Control Loop Using the AD8362  
USE OF AN INPUT BALUN  
Because the AD8362 integrates any input error relative to the  
setpoint, and ideally would fully null this error over an  
appropriate time interval, it follows that VAPC swings rail-  
to-rail over a very narrow range of inputs. In practice, a few  
millidecibels of amplitude deviation at the input fully swing the  
output.  
A balun (balance to unbalance) is used either to transform  
differential RF signals to single-ended form or in reverse to  
convert single-sided signals to differential form. A typical balun  
consists of a short length of transmission line (miniature coaxial  
or twisted pair) through which the signal passes without  
significant degradation, wound on a core (often a ferrite) to  
generate a series mode inductor having a high reactive  
impedance, compared to the through-mode impedance of the  
transmission line, which is often 50 Ω.  
The signal input level at which this occurs (the setpoint) is  
determined by the control voltage, VSET. This voltage defines  
the narrow range of the ac input over which the AD8362s  
output is most sensitive to the absolute input magnitude. In base  
stations, for example, VSET is often delivered by the ramp DAC,  
and the setpoint is a rapidly varying sequence of levels during  
the ramp-up and ramp-down intervals of each burst as well as  
with output power demand variations from one channel to  
another.  
High frequency common-mode voltages applied to the input of  
this line are sustained across this series reactance and do not  
appear at the loaded side of the line. On the other hand, the  
through-mode bandwidth is very high, and the losses incurred  
in a short line of this sort are trivial.  
Baluns of slightly more elaborate construction can provide an  
impedance transformation (usually designated by their  
impedance ratio, for example, 4:1, which becomes a 1:4 ratio  
when used in reverse) in order to convert a single-sided signal  
to the balanced form, as is desirable in driving the AD8362,  
while also presenting a 50 Ω input interface.  
Rev. B | Page 27 of 36  
 
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