AD8346
AC-COUPLED INTERFACE
An ac-coupled interface can also be implemented, as shown in
Figure 29. This is an advantage because there is almost no
voltage loss due to the biasing network, allowing the AD8346
inputs to be driven by the full 2 V p-p differential signal from
the AD9761 (each of the DAC’s 4 outputs delivering 1 V p-p).
The network shown has a high-pass corner frequency of
approximately 14.3 kHz (note that the 12 kΩ input impedance
of the AD8346 has been factored into this calculation).
Increasing the resistors in the network or increasing the
coupling capacitance reduces the corner frequency further.
As in the dc-coupled case, the bias levels on the I and Q inputs
should be set to as precise a level as possible, relative to each
other. This prevents the introduction of additional input offset
voltages. In Figure 29, the bias level on each input is set to
approximately 1.2 V. The 2.43 kΩ resistors should have a ratio
tolerance of 0.1% or better.
Note that the LO suppression can be manually optimized by
replacing a portion of the four top 2.43 kΩ resistors with
potentiometers. In this case, the bottom four resistors in the
biasing network no longer need to be precision devices.
5V
5V
1kΩ
0.1μF
2.43kΩ
2.43kΩ
2.43kΩ
0.01μF
DVDD DCOM
AVDD
100Ω
VPS1
VPS2
IBBP
IBBN
IOUTA
IOUTB
I
LATCH
I
C
2.43kΩ
0.01μF
FILTER
2 ×
DAC
VOUT
Σ
100Ω
DAC
DATA
INPUTS
AD9761
LOIP
LOIN
PHASE
SPLITTER
2.43kΩ
2.43kΩ
2.43kΩ
0.01μF
0.01μF
100Ω
QBBP
QBBN
QOUTA
QOUTB
Q
DAC
LATCH
Q
C
FILTER
2 ×
100Ω
SELECT
AD8346
2.43kΩ
MUX
CONTROL
WRITE
1V p-p EACH PIN
WITH V = 1.2V
CLOCK
SLEEP
FS ADJ REFIO
SET
CM
R
0.1μF
2kΩ
Figure 29. AC-Coupled DAC Interface
Rev. A | Page 13 of 20
ADI [ ADI ]
