AD8345
+5V
10kΩ
+
0.1μF
10μF
0.01μF
1000pF
1000pF
0.01μF
1.5kΩ
348Ω
348Ω
I
8
2
3
IN
5
49.9Ω
VPS1 VPS2
AD8132
IBBP
0.1μF
4
348Ω
24.9Ω
1
6
VOUT
IBBN
Σ
348Ω
0.1μF
LOIP
LOIN
10μF
–5V
+5V
+
PHASE
SPLITTER
QBBP
QBBN
+
AD8345
0.1μF
10μF
348Ω
COM1 COM2 COM3
348Ω
3
8
2
Q
IN
5
49.9Ω
AD8132
0.1μF
4
348Ω
24.9Ω
1
6
+
348Ω
10μF
0.1μF
–5V
Figure 30. Single-Ended 1Q Drive Circuit
Note that this circuit assumes that the single-ended I and Q
signals are ground-referenced. Any differential dc-offsets result
in increased LO leakage at the output of the AD8345.
APPLICATION WITH TxDAC®
Figure 31 shows the AD8345 driven by the AD9761 TxDAC.
(Any of the devices in the Analog Devices’ TxDAC family can
also be used in this application.)
It is possible to drive the baseband inputs with a single-ended
signal biased to 0.7 V, with the unused inputs being biased to a
dc level of 0.7 V. However, this mode of operation is not recom-
mended because any dc level difference between the bias level
of the drive signal and the dc level on the unused input
(including the effect of temperature drift) results in increased
LO leakage. In addition, the maximum output power is reduced
by 6 dB.
The I and Q DACs generate differential output currents of 0 mA
to 10 mA and 10 mA to 0 mA, respectively. The combination of
140 Ω resistors shunted to ground off each DAC output, along
with 210 Ω resistors shunted between each differential DAC
pair, produces a baseband signal into the AD8345 I and Q
inputs that has a differential peak-to-peak swing of 1.2 V with a
dc common-mode bias of 700 mV.
RF OUTPUT
The RF output is designed to drive a 50 Ω load but should be ac
coupled as shown in Figure 28. If the I and Q inputs are driven
in quadrature by 1.2 V p-p signals, then the resulting output
power is approximately −1 dBm (see Figure 3). The RF output
impedance is very close to 50 Ω. As a result, no additional
matching circuitry is required if the output is driving a 50 Ω
load.
Rev. B | Page 14 of 20
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